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XMC7: Ethernet descriptors 8-byte alignment

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This commit is contained in:
robert 2024-05-29 10:48:53 -04:00
parent 9ec2022447
commit d9619a8fa4
2 changed files with 18 additions and 12 deletions
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15
mongoose.c
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@ -17380,12 +17380,15 @@ struct ETH_Type {
#define ETH_DESC_CNT 4 // Descriptors count #define ETH_DESC_CNT 4 // Descriptors count
#define ETH_DS 2 // Descriptor size (words) #define ETH_DS 2 // Descriptor size (words)
// TODO(): handle these in a portable compiler-independent CMSIS-friendly way
#define MG_8BYTE_ALIGNED __attribute__((aligned((8U))))
static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE];
static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE];
static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS]; // RX descriptors static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED;
static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS]; // TX descriptors static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED;
static uint8_t s_txno; // Current TX descriptor static uint8_t s_txno MG_8BYTE_ALIGNED; // Current TX descriptor
static uint8_t s_rxno; // Current RX descriptor static uint8_t s_rxno MG_8BYTE_ALIGNED; // Current RX descriptor
static struct mg_tcpip_if *s_ifp; // MIP interface static struct mg_tcpip_if *s_ifp; // MIP interface
enum { MG_PHY_ADDR = 0, MG_PHYREG_BCR = 0, MG_PHYREG_BSR = 1 }; enum { MG_PHY_ADDR = 0, MG_PHYREG_BCR = 0, MG_PHYREG_BSR = 1 };
@ -17452,8 +17455,8 @@ static bool mg_tcpip_driver_xmc7_init(struct mg_tcpip_if *ifp) {
ETH0->RECEIVE_Q2_PTR = 1; ETH0->RECEIVE_Q2_PTR = 1;
ETH0->RECEIVE_Q1_PTR = 1; ETH0->RECEIVE_Q1_PTR = 1;
// enable interrupts (TX and RX complete) // enable interrupts (RX complete)
ETH0->INT_ENABLE = MG_BIT(7) | MG_BIT(1); ETH0->INT_ENABLE = MG_BIT(1);
// set MAC address // set MAC address
ETH0->SPEC_ADD1_BOTTOM = ETH0->SPEC_ADD1_BOTTOM =

15
src/drivers/xmc7.c
View File

@ -59,12 +59,15 @@ struct ETH_Type {
#define ETH_DESC_CNT 4 // Descriptors count #define ETH_DESC_CNT 4 // Descriptors count
#define ETH_DS 2 // Descriptor size (words) #define ETH_DS 2 // Descriptor size (words)
// TODO(): handle these in a portable compiler-independent CMSIS-friendly way
#define MG_8BYTE_ALIGNED __attribute__((aligned((8U))))
static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE];
static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE];
static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS]; // RX descriptors static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED;
static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS]; // TX descriptors static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED;
static uint8_t s_txno; // Current TX descriptor static uint8_t s_txno MG_8BYTE_ALIGNED; // Current TX descriptor
static uint8_t s_rxno; // Current RX descriptor static uint8_t s_rxno MG_8BYTE_ALIGNED; // Current RX descriptor
static struct mg_tcpip_if *s_ifp; // MIP interface static struct mg_tcpip_if *s_ifp; // MIP interface
enum { MG_PHY_ADDR = 0, MG_PHYREG_BCR = 0, MG_PHYREG_BSR = 1 }; enum { MG_PHY_ADDR = 0, MG_PHYREG_BCR = 0, MG_PHYREG_BSR = 1 };
@ -131,8 +134,8 @@ static bool mg_tcpip_driver_xmc7_init(struct mg_tcpip_if *ifp) {
ETH0->RECEIVE_Q2_PTR = 1; ETH0->RECEIVE_Q2_PTR = 1;
ETH0->RECEIVE_Q1_PTR = 1; ETH0->RECEIVE_Q1_PTR = 1;
// enable interrupts (TX and RX complete) // enable interrupts (RX complete)
ETH0->INT_ENABLE = MG_BIT(7) | MG_BIT(1); ETH0->INT_ENABLE = MG_BIT(1);
// set MAC address // set MAC address
ETH0->SPEC_ADD1_BOTTOM = ETH0->SPEC_ADD1_BOTTOM =