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XMC7: Ethernet descriptors 8-byte alignment
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parent
9ec2022447
commit
d9619a8fa4
15
mongoose.c
15
mongoose.c
@ -17380,12 +17380,15 @@ struct ETH_Type {
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#define ETH_DESC_CNT 4 // Descriptors count
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#define ETH_DS 2 // Descriptor size (words)
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// TODO(): handle these in a portable compiler-independent CMSIS-friendly way
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#define MG_8BYTE_ALIGNED __attribute__((aligned((8U))))
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static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE];
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static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE];
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static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS]; // RX descriptors
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static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS]; // TX descriptors
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static uint8_t s_txno; // Current TX descriptor
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static uint8_t s_rxno; // Current RX descriptor
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static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED;
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static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED;
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static uint8_t s_txno MG_8BYTE_ALIGNED; // Current TX descriptor
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static uint8_t s_rxno MG_8BYTE_ALIGNED; // Current RX descriptor
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static struct mg_tcpip_if *s_ifp; // MIP interface
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enum { MG_PHY_ADDR = 0, MG_PHYREG_BCR = 0, MG_PHYREG_BSR = 1 };
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@ -17452,8 +17455,8 @@ static bool mg_tcpip_driver_xmc7_init(struct mg_tcpip_if *ifp) {
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ETH0->RECEIVE_Q2_PTR = 1;
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ETH0->RECEIVE_Q1_PTR = 1;
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// enable interrupts (TX and RX complete)
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ETH0->INT_ENABLE = MG_BIT(7) | MG_BIT(1);
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// enable interrupts (RX complete)
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ETH0->INT_ENABLE = MG_BIT(1);
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// set MAC address
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ETH0->SPEC_ADD1_BOTTOM =
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@ -59,12 +59,15 @@ struct ETH_Type {
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#define ETH_DESC_CNT 4 // Descriptors count
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#define ETH_DS 2 // Descriptor size (words)
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// TODO(): handle these in a portable compiler-independent CMSIS-friendly way
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#define MG_8BYTE_ALIGNED __attribute__((aligned((8U))))
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static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE];
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static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE];
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static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS]; // RX descriptors
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static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS]; // TX descriptors
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static uint8_t s_txno; // Current TX descriptor
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static uint8_t s_rxno; // Current RX descriptor
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static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED;
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static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS] MG_8BYTE_ALIGNED;
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static uint8_t s_txno MG_8BYTE_ALIGNED; // Current TX descriptor
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static uint8_t s_rxno MG_8BYTE_ALIGNED; // Current RX descriptor
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static struct mg_tcpip_if *s_ifp; // MIP interface
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enum { MG_PHY_ADDR = 0, MG_PHYREG_BCR = 0, MG_PHYREG_BSR = 1 };
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@ -131,8 +134,8 @@ static bool mg_tcpip_driver_xmc7_init(struct mg_tcpip_if *ifp) {
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ETH0->RECEIVE_Q2_PTR = 1;
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ETH0->RECEIVE_Q1_PTR = 1;
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// enable interrupts (TX and RX complete)
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ETH0->INT_ENABLE = MG_BIT(7) | MG_BIT(1);
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// enable interrupts (RX complete)
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ETH0->INT_ENABLE = MG_BIT(1);
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// set MAC address
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ETH0->SPEC_ADD1_BOTTOM =
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