TRRespass
Go to file
2024-10-24 06:12:53 +00:00
drama feat: add log 2024-10-24 06:12:53 +00:00
hammersuite feat: add log 2024-10-24 03:29:30 +00:00
py feat: save image 2024-10-21 02:02:54 +00:00
.clang-format feat: format code 2024-10-21 01:47:43 +00:00
.gitignore feat: add info. 2024-10-21 01:33:09 +00:00
LICENSE Create LICENSE 2021-05-05 12:35:44 +02:00
README.md Improve README. 2020-03-10 17:14:49 +01:00

TRRespass

This is the repository for the TRRespass Rowhammer fuzzer. Recent DDR4 chips include on-chip TRR mitigations that stop bit flips using standard Rowhammer access patterns such as double-sided, single sided or one-location hammering. TRRespass automatically discovers novel Many-sided Rowhammer variants that can bypass these mitigations and trigger bit flips on the recent systems with DDR4 memory. TRRespass requires the DRAM address mapping functions to work effectively.

Additional information about TRRespass can be found here: https://www.vusec.net/projects/trrespass/

The paper that describes more details appears at IEEE Security and Privacy 2020 and can be found here: https://download.vusec.net/papers/trrespass_sp20.pdf

./drama

Inside the drama folder you can find a tool that helps you reverse engineer the DRAM memory mappings used by the memory controller. Read the README in the folder for more details

./hammersuite

Inside the hammersuite folder you can find the fuzzer we used.
Again, read the README in the folder for more details