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feat/support_fiber #2

Merged
tqcq merged 57 commits from feat/support_fiber into master 2024-06-21 10:33:52 +08:00
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20 changed files with 0 additions and 1593 deletions
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Showing only changes of commit f6dea4fa2d - Show all commits

15
CMakeLists.txt
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@ -164,9 +164,6 @@ set(TILE_SRCS
"tile/base/thread/scoped_lock.cc"
"tile/base/thread/spinlock.cc"
"tile/fiber/detail/fiber.cc"
# "tile/fiber/detail/os_fiber.cc" "tile/fiber/detail/posix_os_fiber.cc"
# "tile/fiber/detail/mutex.cc"
"tile/fiber/detail/ucontext.c"
"tile/io/detail/eintr_safe.cc"
"tile/io/native/acceptor.cc"
"tile/io/descriptor.cc"
@ -188,18 +185,6 @@ set(TILE_SRCS
# "tile/rpc/server.cc"
)
list(
APPEND
ASM_SRCS
"tile/fiber/detail/asm/ucontext_aarch64.S"
"tile/fiber/detail/asm/ucontext_arm.S"
"tile/fiber/detail/asm/ucontext_riscv64.S"
"tile/fiber/detail/asm/ucontext_mips64.S"
"tile/fiber/detail/asm/ucontext_mips32.S"
"tile/fiber/detail/asm/ucontext_x64.S"
"tile/fiber/detail/asm/ucontext_x86.S")
set_source_files_properties(${ASM_SRCS} PROPERTIES LANGUAGE C)
if((NOT TILE_HAVE_GETIFADDRS) OR (NOT TILE_HAVE_FREEIFADDRS))
list(APPEND TILE_SRCS "tile/base/net/detail/android/ifaddrs.c")
endif()

153
tile/fiber/detail/asm/ucontext_aarch64.S
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@ -1,153 +0,0 @@
#if defined(__aarch64__)
#define TILE_BUILD_ASM 1
#include "tile/fiber/detail/asm/ucontext_aarch64.h"
#if defined(__ARM_FEATURE_PAC_DEFAULT) && __ARM_FEATURE_PAC_DEFAULT
// ENABLE_PAUTH must be defined to 1 since this value will be used in
// bitwise-shift later!
#define ENABLE_PAUTH 1
#if ((__ARM_FEATURE_PAC_DEFAULT & ((1 << 0) | (1 << 1))) == 0)
#error Pointer authentication defines no valid key!
#endif
#else
#define ENABLE_PAUTH 0
#endif
#if defined(__ARM_FEATURE_BTI_DEFAULT) && (__ARM_FEATURE_BTI_DEFAULT == 1)
// ENABLE_BTI must be defined to 1 since this value will be used in
// bitwise-shift later!
#define ENABLE_BTI 1
#else
#define ENABLE_BTI 0
#endif
// Although Pointer Authentication and Branch Target Instructions are
// technically seperate features they work together, i.e. the paciasp and
// pacibsp instructions serve as BTI landing pads. Therefore PA-instructions are
// enabled when PA _or_ BTI is enabled!
#if ENABLE_PAUTH || ENABLE_BTI
// See section "Pointer Authentication" of
// https://developer.arm.com/documentation/101028/0012/5--Feature-test-macros
// for details how to interpret __ARM_FEATURE_PAC_DEFAULT
#if (__ARM_FEATURE_PAC_DEFAULT & (1 << 0))
#define PAUTH_SIGN_SP paciasp
#define PAUTH_AUTH_SP autiasp
#else
#define PAUTH_SIGN_SP pacibsp
#define PAUTH_AUTH_SP autibsp
#endif
#else
#define PAUTH_SIGN_SP
#define PAUTH_AUTH_SP
#endif
// void tile_ucontext_swap(tile_ucontext_t* from, const tile_ucontext_t* to)
// x0: from
// x1: to
.text
.global TILE_ASM_SYMBOL(tile_ucontext_swap)
// .balign 16
.align 8
TILE_ASM_SYMBOL(tile_ucontext_swap):
// Save context 'from'
// TODO: pairs of str can be combined with stp.
PAUTH_SIGN_SP
// Store special purpose registers
str x16, [x0, #TILE_REG_r16]
str x17, [x0, #TILE_REG_r17]
str x18, [x0, #TILE_REG_r18]
// Store callee-preserved registers
str x19, [x0, #TILE_REG_r19]
str x20, [x0, #TILE_REG_r20]
str x21, [x0, #TILE_REG_r21]
str x22, [x0, #TILE_REG_r22]
str x23, [x0, #TILE_REG_r23]
str x24, [x0, #TILE_REG_r24]
str x25, [x0, #TILE_REG_r25]
str x26, [x0, #TILE_REG_r26]
str x27, [x0, #TILE_REG_r27]
str x28, [x0, #TILE_REG_r28]
str x29, [x0, #TILE_REG_r29]
str d8, [x0, #TILE_REG_v8]
str d9, [x0, #TILE_REG_v9]
str d10, [x0, #TILE_REG_v10]
str d11, [x0, #TILE_REG_v11]
str d12, [x0, #TILE_REG_v12]
str d13, [x0, #TILE_REG_v13]
str d14, [x0, #TILE_REG_v14]
str d15, [x0, #TILE_REG_v15]
// Store sp and lr
mov x2, sp
str x2, [x0, #TILE_REG_SP]
str x30, [x0, #TILE_REG_LR]
// Load context 'to'
mov x7, x1
// Load special purpose registers
ldr x16, [x7, #TILE_REG_r16]
ldr x17, [x7, #TILE_REG_r17]
ldr x18, [x7, #TILE_REG_r18]
// Load callee-preserved registers
ldr x19, [x7, #TILE_REG_r19]
ldr x20, [x7, #TILE_REG_r20]
ldr x21, [x7, #TILE_REG_r21]
ldr x22, [x7, #TILE_REG_r22]
ldr x23, [x7, #TILE_REG_r23]
ldr x24, [x7, #TILE_REG_r24]
ldr x25, [x7, #TILE_REG_r25]
ldr x26, [x7, #TILE_REG_r26]
ldr x27, [x7, #TILE_REG_r27]
ldr x28, [x7, #TILE_REG_r28]
ldr x29, [x7, #TILE_REG_r29]
ldr d8, [x7, #TILE_REG_v8]
ldr d9, [x7, #TILE_REG_v9]
ldr d10, [x7, #TILE_REG_v10]
ldr d11, [x7, #TILE_REG_v11]
ldr d12, [x7, #TILE_REG_v12]
ldr d13, [x7, #TILE_REG_v13]
ldr d14, [x7, #TILE_REG_v14]
ldr d15, [x7, #TILE_REG_v15]
// Load parameter registers
ldr x0, [x7, #TILE_REG_r0]
ldr x1, [x7, #TILE_REG_r1]
// Load sp and lr
ldr x30, [x7, #TILE_REG_LR]
ldr x2, [x7, #TILE_REG_SP]
mov sp, x2
PAUTH_AUTH_SP
ret
#if ENABLE_PAUTH || ENABLE_BTI
// see
// https://github.com/ARM-software/abi-aa/blob/main/aaelf64/aaelf64.rst#program-property
.pushsection .note.gnu.property, "a";
.balign 8
.long 4
.long 0x10
.long 0x5
.asciz "GNU"
.long 0xc0000000 /* GNU_PROPERTY_AARCH64_FEATURE_1_AND */
.long 4
.long ((ENABLE_PAUTH)<<1) | ((ENABLE_BTI)<<0) /* PAuth and BTI */
.long 0
.popsection
#endif
#endif // defined(__aarch64__)

143
tile/fiber/detail/asm/ucontext_aarch64.h
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@ -1,143 +0,0 @@
#ifndef TILE_FIBER_DETAIL_ASM_UCONTEXT_AARCH64_H
#define TILE_FIBER_DETAIL_ASM_UCONTEXT_AARCH64_H
#pragma once
#define TILE_REG_r0 0x00
#define TILE_REG_r1 0x08
#define TILE_REG_r16 0x10
#define TILE_REG_r17 0x18
#define TILE_REG_r18 0x20
#define TILE_REG_r19 0x28
#define TILE_REG_r20 0x30
#define TILE_REG_r21 0x38
#define TILE_REG_r22 0x40
#define TILE_REG_r23 0x48
#define TILE_REG_r24 0x50
#define TILE_REG_r25 0x58
#define TILE_REG_r26 0x60
#define TILE_REG_r27 0x68
#define TILE_REG_r28 0x70
#define TILE_REG_r29 0x78
#define TILE_REG_v8 0x80
#define TILE_REG_v9 0x88
#define TILE_REG_v10 0x90
#define TILE_REG_v11 0x98
#define TILE_REG_v12 0xa0
#define TILE_REG_v13 0xa8
#define TILE_REG_v14 0xb0
#define TILE_REG_v15 0xb8
#define TILE_REG_SP 0xc0
#define TILE_REG_LR 0xc8
#if defined(__APPLE__)
#define TILE_ASM_SYMBOL(x) _##x
#else
#define TILE_ASM_SYMBOL(x) x
#endif
#ifndef TILE_BUILD_ASM
#include <stdint.h>
// Procedure Call Standard for the ARM 64-bit Architecture
// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapcs64.pdf
struct tile_ucontext_t {
// parameter registers
uintptr_t r0;
uintptr_t r1;
// special purpose registers
uintptr_t r16;
uintptr_t r17;
uintptr_t r18; // platform specific (maybe inter-procedural state)
// callee-saved registers
uintptr_t r19;
uintptr_t r20;
uintptr_t r21;
uintptr_t r22;
uintptr_t r23;
uintptr_t r24;
uintptr_t r25;
uintptr_t r26;
uintptr_t r27;
uintptr_t r28;
uintptr_t r29;
uintptr_t v8;
uintptr_t v9;
uintptr_t v10;
uintptr_t v11;
uintptr_t v12;
uintptr_t v13;
uintptr_t v14;
uintptr_t v15;
uintptr_t SP; // stack pointer
uintptr_t LR; // link register (R30)
};
#define TILE_UCONTEXT_ARG0(ctx, stack_top) (ctx)->LR
#define TILE_UCONTEXT_ARG1(ctx, stack_top) (ctx)->r0
#define TILE_UCONTEXT_ARG2(ctx, stack_top) (ctx)->r1
#define TILE_UCONTEXT_ARG3(ctx, stack_top) (ctx)->SP
#ifdef __cplusplus
#include <cstddef>
static_assert(offsetof(tile_ucontext_t, r0) == TILE_REG_r0,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r1) == TILE_REG_r1,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r16) == TILE_REG_r16,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r17) == TILE_REG_r17,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r18) == TILE_REG_r18,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r19) == TILE_REG_r19,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r20) == TILE_REG_r20,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r21) == TILE_REG_r21,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r22) == TILE_REG_r22,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r23) == TILE_REG_r23,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r24) == TILE_REG_r24,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r25) == TILE_REG_r25,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r26) == TILE_REG_r26,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r27) == TILE_REG_r27,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r28) == TILE_REG_r28,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r29) == TILE_REG_r29,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v8) == TILE_REG_v8,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v9) == TILE_REG_v9,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v10) == TILE_REG_v10,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v11) == TILE_REG_v11,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v12) == TILE_REG_v12,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v13) == TILE_REG_v13,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v14) == TILE_REG_v14,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v15) == TILE_REG_v15,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, SP) == TILE_REG_SP,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, LR) == TILE_REG_LR,
"Bad register offset");
#endif // __cplusplus
#endif // TILE_BUILD_ASM
#endif // TILE_FIBER_DETAIL_ASM_UCONTEXT_AARCH64_H

75
tile/fiber/detail/asm/ucontext_arm.S
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@ -1,75 +0,0 @@
// Copyright 2019 The Marl Authors.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#if defined(__arm__)
#define TILE_BUILD_ASM 1
#include "tile/fiber/detail/asm/ucontext_arm.h"
// void tile_ucontext_swap(tile_ucontext_t* from, const tile_ucontext_t* to)
// x0: from
// x1: to
.text
.global tile_ucontext_swap
.align 4
.type tile_ucontext_swap, %function
tile_ucontext_swap:
// Save context 'from'
// TODO: multiple registers can be stored in a single instruction with: stm rA, {rB-rC}
// Store special purpose registers
str r12, [r0, #TILE_REG_r12]
// Store callee-preserved registers
str r4, [r0, #TILE_REG_r4]
str r5, [r0, #TILE_REG_r5]
str r6, [r0, #TILE_REG_r6]
str r7, [r0, #TILE_REG_r7]
str r8, [r0, #TILE_REG_r8]
str r9, [r0, #TILE_REG_r9]
str r10, [r0, #TILE_REG_r10]
str r11, [r0, #TILE_REG_r11]
// Store sp, lr and pc
str sp, [r0, #TILE_REG_SP]
str lr, [r0, #TILE_REG_LR]
// Load context 'to'
// TODO: multiple registers can be loaded in a single instruction with: ldm rA, {rB-rC}
mov r3, r1
// Load special purpose registers
ldr r12, [r3, #TILE_REG_r12]
// Load callee-preserved registers
ldr r4, [r3, #TILE_REG_r4]
ldr r5, [r3, #TILE_REG_r5]
ldr r6, [r3, #TILE_REG_r6]
ldr r7, [r3, #TILE_REG_r7]
ldr r8, [r3, #TILE_REG_r8]
ldr r9, [r3, #TILE_REG_r9]
ldr r10, [r3, #TILE_REG_r10]
ldr r11, [r3, #TILE_REG_r11]
// Load parameter registers
ldr r0, [r3, #TILE_REG_r0]
ldr r1, [r3, #TILE_REG_r1]
// Load sp, lr and pc
ldr sp, [r3, #TILE_REG_SP]
ldr lr, [r3, #TILE_REG_LR]
mov pc, lr
#endif // defined(__arm__)

110
tile/fiber/detail/asm/ucontext_arm.h
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@ -1,110 +0,0 @@
#define TILE_REG_r0 0x00
#define TILE_REG_r1 0x04
#define TILE_REG_r12 0x08
#define TILE_REG_r4 0x0c
#define TILE_REG_r5 0x10
#define TILE_REG_r6 0x14
#define TILE_REG_r7 0x18
#define TILE_REG_r8 0x1c
#define TILE_REG_r9 0x20
#define TILE_REG_r10 0x24
#define TILE_REG_r11 0x28
#define TILE_REG_v8 0x2c
#define TILE_REG_v9 0x30
#define TILE_REG_v10 0x34
#define TILE_REG_v11 0x38
#define TILE_REG_v12 0x3c
#define TILE_REG_v13 0x40
#define TILE_REG_v14 0x44
#define TILE_REG_v15 0x48
#define TILE_REG_SP 0x4c
#define TILE_REG_LR 0x50
#ifndef TILE_BUILD_ASM
#include <stdint.h>
// Procedure Call Standard for the ARM 64-bit Architecture
// http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055b/IHI0055B_aapcs64.pdf
struct tile_ucontext_t {
// parameter registers
uintptr_t r0;
uintptr_t r1;
// special purpose registers
uintptr_t r12; // Intra-Procedure-call
// callee-saved registers
uintptr_t r4;
uintptr_t r5;
uintptr_t r6;
uintptr_t r7;
uintptr_t r8;
uintptr_t r9;
uintptr_t r10;
uintptr_t r11;
uintptr_t v8;
uintptr_t v9;
uintptr_t v10;
uintptr_t v11;
uintptr_t v12;
uintptr_t v13;
uintptr_t v14;
uintptr_t v15;
uintptr_t SP; // stack pointer (r13)
uintptr_t LR; // link register (r14)
};
#define TILE_UCONTEXT_ARG0(ctx, stack_top) (ctx)->LR
#define TILE_UCONTEXT_ARG1(ctx, stack_top) (ctx)->r0
#define TILE_UCONTEXT_ARG2(ctx, stack_top) (ctx)->r1
#define TILE_UCONTEXT_ARG3(ctx, stack_top) (ctx)->SP
#ifdef __cplusplus
#include <cstddef>
static_assert(offsetof(tile_ucontext_t, r0) == TILE_REG_r0,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r1) == TILE_REG_r1,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r12) == TILE_REG_r12,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r4) == TILE_REG_r4,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r5) == TILE_REG_r5,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r6) == TILE_REG_r6,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r7) == TILE_REG_r7,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r8) == TILE_REG_r8,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r9) == TILE_REG_r9,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r10) == TILE_REG_r10,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, r11) == TILE_REG_r11,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v8) == TILE_REG_v8,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v9) == TILE_REG_v9,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v10) == TILE_REG_v10,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v11) == TILE_REG_v11,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v12) == TILE_REG_v12,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v13) == TILE_REG_v13,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v14) == TILE_REG_v14,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, v15) == TILE_REG_v15,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, SP) == TILE_REG_SP,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, LR) == TILE_REG_LR,
"Bad register offset");
#endif // __cplusplus
#endif // TILE_BUILD_ASM

97
tile/fiber/detail/asm/ucontext_mips32.S
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@ -1,97 +0,0 @@
// Copyright 2020 The Marl Authors.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#if defined(__mips__) && _MIPS_SIM == _ABIO32
#define TILE_BUILD_ASM 1
#include "tile/fiber/detail/asm/ucontext_mips32.h"
// void tile_ucontext_swap(tile_ucontext_t* from, const tile_ucontext_t* to)
// a0: from
// a1: to
.text
.global TILE_ASM_SYMBOL(tile_ucontext_swap)
.align 2
.type TILE_ASM_SYMBOL(tile_ucontext_swap),@function
.ent TILE_ASM_SYMBOL(tile_ucontext_swap)
TILE_ASM_SYMBOL(tile_ucontext_swap):
// Save context 'from'
// sw $v0, TILE_REG_v0($a0)
// Store callee-preserved registers
sw $s0, TILE_REG_s0($a0)
sw $s1, TILE_REG_s1($a0)
sw $s2, TILE_REG_s2($a0)
sw $s3, TILE_REG_s3($a0)
sw $s4, TILE_REG_s4($a0)
sw $s5, TILE_REG_s5($a0)
sw $s6, TILE_REG_s6($a0)
sw $s7, TILE_REG_s7($a0)
#ifdef __mips_hard_float
s.d $f20, TILE_REG_f20($a0)
s.d $f22, TILE_REG_f22($a0)
s.d $f24, TILE_REG_f24($a0)
s.d $f26, TILE_REG_f26($a0)
s.d $f28, TILE_REG_f28($a0)
s.d $f30, TILE_REG_f30($a0)
#endif // __mips_hard_float
sw $gp, TILE_REG_gp($a0)
sw $sp, TILE_REG_sp($a0)
sw $fp, TILE_REG_fp($a0)
sw $ra, TILE_REG_ra($a0)
move $v0, $a1 // Function have no return, so safe to touch v0
// Recover callee-preserved registers
lw $s0, TILE_REG_s0($v0)
lw $s1, TILE_REG_s1($v0)
lw $s2, TILE_REG_s2($v0)
lw $s3, TILE_REG_s3($v0)
lw $s4, TILE_REG_s4($v0)
lw $s5, TILE_REG_s5($v0)
lw $s6, TILE_REG_s6($v0)
lw $s7, TILE_REG_s7($v0)
#ifdef __mips_hard_float
l.d $f20, TILE_REG_f20($v0)
l.d $f22, TILE_REG_f22($v0)
l.d $f24, TILE_REG_f24($v0)
l.d $f26, TILE_REG_f26($v0)
l.d $f28, TILE_REG_f28($v0)
l.d $f30, TILE_REG_f30($v0)
#endif // __mips_hard_float
lw $gp, TILE_REG_gp($v0)
lw $sp, TILE_REG_sp($v0)
lw $fp, TILE_REG_fp($v0)
lw $ra, TILE_REG_ra($v0)
// Recover arguments
lw $a0, TILE_REG_a0($v0)
lw $a1, TILE_REG_a1($v0)
lw $a2, TILE_REG_a2($v0)
lw $a3, TILE_REG_a3($v0)
// lw $v0, TILE_REG_v0($v0)
jr $ra
.end TILE_ASM_SYMBOL(tile_ucontext_swap)
.size TILE_ASM_SYMBOL(tile_ucontext_swap), .-TILE_ASM_SYMBOL(tile_ucontext_swap)
.section .note.GNU_stack,"",%progbits
#endif // defined(__mips__) && _MIPS_SIM == _ABIO32

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#ifndef TILE_FIBER_DETAIL_ASM_UCONTEXT_MIPS32_H
#define TILE_FIBER_DETAIL_ASM_UCONTEXT_MIPS32_H
#pragma once
#define TILE_REG_f20 0x00
#define TILE_REG_f22 0x08
#define TILE_REG_f24 0x10
#define TILE_REG_f26 0x18
#define TILE_REG_f28 0x20
#define TILE_REG_f30 0x28
#define TILE_REG_a0 0x30
#define TILE_REG_a1 0x34
#define TILE_REG_a2 0x38
#define TILE_REG_a3 0x3C
#define TILE_REG_s0 0x40
#define TILE_REG_s1 0x44
#define TILE_REG_s2 0x48
#define TILE_REG_s3 0x4C
#define TILE_REG_s4 0x50
#define TILE_REG_s5 0x54
#define TILE_REG_s6 0x58
#define TILE_REG_s7 0x5C
#define TILE_REG_gp 0x60
#define TILE_REG_sp 0x64
#define TILE_REG_fp 0x68
#define TILE_REG_ra 0x6C
#if defined(__APPLE__)
#define TILE_ASM_SYMBOL(x) _##x
#else
#define TILE_ASM_SYMBOL(x) x
#endif
#ifndef TILE_BUILD_ASM
#include <stdint.h>
struct tile_ucontext_t {
double f20;
double f22;
double f24;
double f26;
double f28;
double f30;
// parameter registers (First two)
uintptr_t a0;
uintptr_t a1;
uintptr_t a2;
uintptr_t a3;
// callee-saved registers
uintptr_t s0;
uintptr_t s1;
uintptr_t s2;
uintptr_t s3;
uintptr_t s4;
uintptr_t s5;
uintptr_t s6;
uintptr_t s7;
uintptr_t gp;
uintptr_t sp;
uintptr_t fp;
uintptr_t ra;
};
#define TILE_UCONTEXT_ARG0(ctx, stack_top) (ctx)->ra
#define TILE_UCONTEXT_ARG1(ctx, stack_top) (ctx)->a0
#define TILE_UCONTEXT_ARG2(ctx, stack_top) (ctx)->a1
#define TILE_UCONTEXT_ARG3(ctx, stack_top) (ctx)->sp
#ifdef __cplusplus
#include <cstddef>
static_assert(offsetof(tile_ucontext_t, f20) == TILE_REG_f20,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f22) == TILE_REG_f22,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f24) == TILE_REG_f24,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f26) == TILE_REG_f26,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f28) == TILE_REG_f28,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f30) == TILE_REG_f30,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, a0) == TILE_REG_a0,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, a1) == TILE_REG_a1,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, a2) == TILE_REG_a2,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, a3) == TILE_REG_a3,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s0) == TILE_REG_s0,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s1) == TILE_REG_s1,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s2) == TILE_REG_s2,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s3) == TILE_REG_s3,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s4) == TILE_REG_s4,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s5) == TILE_REG_s5,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s6) == TILE_REG_s6,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s7) == TILE_REG_s7,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, gp) == TILE_REG_gp,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, sp) == TILE_REG_sp,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fp) == TILE_REG_fp,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, ra) == TILE_REG_ra,
"Bad register offset");
#endif // __cplusplus
#endif // TILE_BUILD_ASM
#endif // TILE_FIBER_DETAIL_ASM_UCONTEXT_MIPS32_H

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tile/fiber/detail/asm/ucontext_mips64.S
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// Copyright 2020 The Marl Authors.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#if defined(__mips__) && _MIPS_SIM == _ABI64
#define TILE_BUILD_ASM 1
#include "tile/fiber/detail/asm/ucontext_mips64.h"
// void tile_ucontext_swap(tile_ucontext_t* from, const tile_ucontext_t* to)
// a0: from
// a1: to
.text
.global TILE_ASM_SYMBOL(tile_ucontext_swap)
.align 4
.type TILE_ASM_SYMBOL(tile_ucontext_swap), @function
.ent TILE_ASM_SYMBOL(tile_ucontext_swap)
TILE_ASM_SYMBOL(tile_ucontext_swap):
// Save context 'from'
// Store callee-preserved registers
sd $s0, TILE_REG_s0($a0)
sd $s1, TILE_REG_s1($a0)
sd $s2, TILE_REG_s2($a0)
sd $s3, TILE_REG_s3($a0)
sd $s4, TILE_REG_s4($a0)
sd $s5, TILE_REG_s5($a0)
sd $s6, TILE_REG_s6($a0)
sd $s7, TILE_REG_s7($a0)
#ifdef __mips_hard_float
s.d $f24, TILE_REG_f24($a0)
s.d $f25, TILE_REG_f25($a0)
s.d $f26, TILE_REG_f26($a0)
s.d $f27, TILE_REG_f27($a0)
s.d $f28, TILE_REG_f28($a0)
s.d $f29, TILE_REG_f29($a0)
s.d $f31, TILE_REG_f30($a0)
s.d $f31, TILE_REG_f31($a0)
#endif // __mips_hard_float
sd $gp, TILE_REG_gp($a0)
sd $sp, TILE_REG_sp($a0)
sd $fp, TILE_REG_fp($a0)
sd $ra, TILE_REG_ra($a0)
move $v0, $a1 // Function have no return, so safe to touch v0
// Recover callee-preserved registers
ld $s0, TILE_REG_s0($v0)
ld $s1, TILE_REG_s1($v0)
ld $s2, TILE_REG_s2($v0)
ld $s3, TILE_REG_s3($v0)
ld $s4, TILE_REG_s4($v0)
ld $s5, TILE_REG_s5($v0)
ld $s6, TILE_REG_s6($v0)
ld $s7, TILE_REG_s7($v0)
#ifdef __mips_hard_float
l.d $f24, TILE_REG_f24($v0)
l.d $f25, TILE_REG_f25($v0)
l.d $f26, TILE_REG_f26($v0)
l.d $f27, TILE_REG_f27($v0)
l.d $f28, TILE_REG_f28($v0)
l.d $f29, TILE_REG_f29($v0)
l.d $f31, TILE_REG_f30($v0)
l.d $f31, TILE_REG_f31($v0)
#endif // __mips_hard_float
ld $gp, TILE_REG_gp($v0)
ld $sp, TILE_REG_sp($v0)
ld $fp, TILE_REG_fp($v0)
ld $ra, TILE_REG_ra($v0)
// Recover arguments
ld $a0, TILE_REG_a0($v0)
ld $a1, TILE_REG_a1($v0)
jr $ra
.end TILE_ASM_SYMBOL(tile_ucontext_swap)
.size TILE_ASM_SYMBOL(tile_ucontext_swap), .-TILE_ASM_SYMBOL(tile_ucontext_swap)
.section .note.GNU-stack,"",%progbits
#endif // defined(__mips__) && _MIPS_SIM == _ABI64

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tile/fiber/detail/asm/ucontext_mips64.h
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#ifndef TILE_FIBER_DETAIL_ASM_UCONTEXT_MIPS64_H
#define TILE_FIBER_DETAIL_ASM_UCONTEXT_MIPS64_H
#pragma once
#define TILE_REG_a0 0x00
#define TILE_REG_a1 0x08
#define TILE_REG_s0 0x10
#define TILE_REG_s1 0x18
#define TILE_REG_s2 0x20
#define TILE_REG_s3 0x28
#define TILE_REG_s4 0x30
#define TILE_REG_s5 0x38
#define TILE_REG_s6 0x40
#define TILE_REG_s7 0x48
#define TILE_REG_f24 0x50
#define TILE_REG_f25 0x58
#define TILE_REG_f26 0x60
#define TILE_REG_f27 0x68
#define TILE_REG_f28 0x70
#define TILE_REG_f29 0x78
#define TILE_REG_f30 0x80
#define TILE_REG_f31 0x88
#define TILE_REG_gp 0x90
#define TILE_REG_sp 0x98
#define TILE_REG_fp 0xa0
#define TILE_REG_ra 0xa8
#if defined(__APPLE__)
#define TILE_ASM_SYMBOL(x) _##x
#else
#define TILE_ASM_SYMBOL(x) x
#endif
#ifndef TILE_BUILD_ASM
#include <stdint.h>
struct tile_ucontext_t {
// parameter registers (First two)
uintptr_t a0;
uintptr_t a1;
// callee-saved registers
uintptr_t s0;
uintptr_t s1;
uintptr_t s2;
uintptr_t s3;
uintptr_t s4;
uintptr_t s5;
uintptr_t s6;
uintptr_t s7;
uintptr_t f24;
uintptr_t f25;
uintptr_t f26;
uintptr_t f27;
uintptr_t f28;
uintptr_t f29;
uintptr_t f30;
uintptr_t f31;
uintptr_t gp;
uintptr_t sp;
uintptr_t fp;
uintptr_t ra;
};
#define TILE_UCONTEXT_ARG0(ctx, stack_top) (ctx)->ra
#define TILE_UCONTEXT_ARG1(ctx, stack_top) (ctx)->a0
#define TILE_UCONTEXT_ARG2(ctx, stack_top) (ctx)->a1
#define TILE_UCONTEXT_ARG3(ctx, stack_top) (ctx)->sp
#ifdef __cplusplus
#include <cstddef>
static_assert(offsetof(tile_ucontext_t, a0) == TILE_REG_a0,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, a1) == TILE_REG_a1,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s0) == TILE_REG_s0,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s1) == TILE_REG_s1,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s2) == TILE_REG_s2,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s3) == TILE_REG_s3,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s4) == TILE_REG_s4,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s5) == TILE_REG_s5,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s6) == TILE_REG_s6,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s7) == TILE_REG_s7,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f24) == TILE_REG_f24,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f25) == TILE_REG_f25,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f26) == TILE_REG_f26,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f27) == TILE_REG_f27,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f28) == TILE_REG_f28,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f29) == TILE_REG_f29,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f30) == TILE_REG_f30,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, f31) == TILE_REG_f31,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, gp) == TILE_REG_gp,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, sp) == TILE_REG_sp,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fp) == TILE_REG_fp,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, ra) == TILE_REG_ra,
"Bad register offset");
#endif // __cplusplus
#endif // TILE_BUILD_ASM
#endif // TILE_FIBER_DETAIL_ASM_UCONTEXT_MIPS64_H

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tile/fiber/detail/asm/ucontext_riscv64.S
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// Copyright 2021 The Marl Authors.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#if defined(__riscv) && __riscv_xlen == 64
#define TILE_BUILD_ASM 1
#include "tile/fiber/detail/asm/ucontext_riscv64.h"
// void tile_ucontext_swap(tile_ucontext_t* from, const tile_ucontext_t* to)
// a0: from
// a1: to
.text
.global tile_ucontext_swap
.align 4
tile_ucontext_swap:
// Save context 'from'
// Store callee-preserved registers
sd s0, TILE_REG_s0(a0)
sd s1, TILE_REG_s1(a0)
sd s2, TILE_REG_s2(a0)
sd s3, TILE_REG_s3(a0)
sd s4, TILE_REG_s4(a0)
sd s5, TILE_REG_s5(a0)
sd s6, TILE_REG_s6(a0)
sd s7, TILE_REG_s7(a0)
sd s8, TILE_REG_s8(a0)
sd s9, TILE_REG_s9(a0)
sd s10, TILE_REG_s10(a0)
sd s11, TILE_REG_s11(a0)
fsd fs0, TILE_REG_fs0(a0)
fsd fs1, TILE_REG_fs1(a0)
fsd fs2, TILE_REG_fs2(a0)
fsd fs3, TILE_REG_fs3(a0)
fsd fs4, TILE_REG_fs4(a0)
fsd fs5, TILE_REG_fs5(a0)
fsd fs6, TILE_REG_fs6(a0)
fsd fs7, TILE_REG_fs7(a0)
fsd fs8, TILE_REG_fs8(a0)
fsd fs9, TILE_REG_fs9(a0)
fsd fs10, TILE_REG_fs10(a0)
fsd fs11, TILE_REG_fs11(a0)
sd sp, TILE_REG_sp(a0)
// On RISC-V ra is caller-saved
// but we need ra to jump to the trampoline
sd ra, TILE_REG_ra(a0)
move t0, a1 // Store a1 in temporary register
// Recover callee-preserved registers
ld s0, TILE_REG_s0(t0)
ld s1, TILE_REG_s1(t0)
ld s2, TILE_REG_s2(t0)
ld s3, TILE_REG_s3(t0)
ld s4, TILE_REG_s4(t0)
ld s5, TILE_REG_s5(t0)
ld s6, TILE_REG_s6(t0)
ld s7, TILE_REG_s7(t0)
ld s8, TILE_REG_s8(t0)
ld s9, TILE_REG_s9(t0)
ld s10, TILE_REG_s10(t0)
ld s11, TILE_REG_s11(t0)
fld fs0, TILE_REG_fs0(t0)
fld fs1, TILE_REG_fs1(t0)
fld fs2, TILE_REG_fs2(t0)
fld fs3, TILE_REG_fs3(t0)
fld fs4, TILE_REG_fs4(t0)
fld fs5, TILE_REG_fs5(t0)
fld fs6, TILE_REG_fs6(t0)
fld fs7, TILE_REG_fs7(t0)
fld fs8, TILE_REG_fs8(t0)
fld fs9, TILE_REG_fs9(t0)
fld fs10, TILE_REG_fs10(t0)
fld fs11, TILE_REG_fs11(t0)
ld sp, TILE_REG_sp(t0)
ld ra, TILE_REG_ra(t0)
// Recover arguments
ld a0, TILE_REG_a0(t0)
ld a1, TILE_REG_a1(t0)
jr ra // Jump to the trampoline
#endif // defined(__riscv) && __riscv_xlen == 64

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#ifndef TILE_FIBER_DETAIL_ASM_UCONTEXT_RISCV64_H
#define TILE_FIBER_DETAIL_ASM_UCONTEXT_RISCV64_H
#pragma once
#define TILE_REG_a0 0x00
#define TILE_REG_a1 0x08
#define TILE_REG_s0 0x10
#define TILE_REG_s1 0x18
#define TILE_REG_s2 0x20
#define TILE_REG_s3 0x28
#define TILE_REG_s4 0x30
#define TILE_REG_s5 0x38
#define TILE_REG_s6 0x40
#define TILE_REG_s7 0x48
#define TILE_REG_s8 0x50
#define TILE_REG_s9 0x58
#define TILE_REG_s10 0x60
#define TILE_REG_s11 0x68
#define TILE_REG_fs0 0x70
#define TILE_REG_fs1 0x78
#define TILE_REG_fs2 0x80
#define TILE_REG_fs3 0x88
#define TILE_REG_fs4 0x90
#define TILE_REG_fs5 0x98
#define TILE_REG_fs6 0xa0
#define TILE_REG_fs7 0xa8
#define TILE_REG_fs8 0xb0
#define TILE_REG_fs9 0xb8
#define TILE_REG_fs10 0xc0
#define TILE_REG_fs11 0xc8
#define TILE_REG_sp 0xd0
#define TILE_REG_ra 0xd8
#ifndef TILE_BUILD_ASM
#include <stdint.h>
struct tile_ucontext_t {
// parameter registers (First two)
uintptr_t a0;
uintptr_t a1;
// callee-saved registers
uintptr_t s0;
uintptr_t s1;
uintptr_t s2;
uintptr_t s3;
uintptr_t s4;
uintptr_t s5;
uintptr_t s6;
uintptr_t s7;
uintptr_t s8;
uintptr_t s9;
uintptr_t s10;
uintptr_t s11;
uintptr_t fs0;
uintptr_t fs1;
uintptr_t fs2;
uintptr_t fs3;
uintptr_t fs4;
uintptr_t fs5;
uintptr_t fs6;
uintptr_t fs7;
uintptr_t fs8;
uintptr_t fs9;
uintptr_t fs10;
uintptr_t fs11;
uintptr_t sp;
uintptr_t ra;
};
#define TILE_UCONTEXT_ARG0(ctx, stack_top) (ctx)->ra
#define TILE_UCONTEXT_ARG1(ctx, stack_top) (ctx)->a0
#define TILE_UCONTEXT_ARG2(ctx, stack_top) (ctx)->a1
#define TILE_UCONTEXT_ARG3(ctx, stack_top) (ctx)->sp
#ifdef __cplusplus
#include <cstddef>
static_assert(offsetof(tile_ucontext_t, a0) == TILE_REG_a0,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, a1) == TILE_REG_a1,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s0) == TILE_REG_s0,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s1) == TILE_REG_s1,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s2) == TILE_REG_s2,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s3) == TILE_REG_s3,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s4) == TILE_REG_s4,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s5) == TILE_REG_s5,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s6) == TILE_REG_s6,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s7) == TILE_REG_s7,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s8) == TILE_REG_s8,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s9) == TILE_REG_s9,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s10) == TILE_REG_s10,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, s11) == TILE_REG_s11,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fs0) == TILE_REG_fs0,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fs1) == TILE_REG_fs1,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fs2) == TILE_REG_fs2,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fs3) == TILE_REG_fs3,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fs4) == TILE_REG_fs4,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fs5) == TILE_REG_fs5,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fs6) == TILE_REG_fs6,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fs7) == TILE_REG_fs7,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fs8) == TILE_REG_fs8,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fs9) == TILE_REG_fs9,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fs10) == TILE_REG_fs10,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, fs11) == TILE_REG_fs11,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, sp) == TILE_REG_sp,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, ra) == TILE_REG_ra,
"Bad register offset");
#endif // __cplusplus
#endif // TILE_BUILD_ASM
#endif // TILE_FIBER_DETAIL_ASM_UCONTEXT_RISCV64_H

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// Copyright 2019 The Marl Authors.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// https://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#if defined(__x86_64__)
#define TILE_BUILD_ASM 1
#include "tile/fiber/detail/asm/ucontext_x64.h"
// void tile_ucontext_swap(tile_ucontext_t* from, const tile_ucontext_t* to)
// rdi: from
// rsi: to
.text
.global TILE_ASM_SYMBOL(tile_ucontext_swap)
.align 4
TILE_ASM_SYMBOL(tile_ucontext_swap):
// Save context 'from'
// Store callee-preserved registers
movq %rbx, TILE_REG_RBX(%rdi)
movq %rbp, TILE_REG_RBP(%rdi)
movq %r12, TILE_REG_R12(%rdi)
movq %r13, TILE_REG_R13(%rdi)
movq %r14, TILE_REG_R14(%rdi)
movq %r15, TILE_REG_R15(%rdi)
movq (%rsp), %rcx /* call stores the return address on the stack before jumping */
movq %rcx, TILE_REG_RIP(%rdi)
leaq 8(%rsp), %rcx /* skip the pushed return address */
movq %rcx, TILE_REG_RSP(%rdi)
// Load context 'to'
movq %rsi, %r8
// Load callee-preserved registers
movq TILE_REG_RBX(%r8), %rbx
movq TILE_REG_RBP(%r8), %rbp
movq TILE_REG_R12(%r8), %r12
movq TILE_REG_R13(%r8), %r13
movq TILE_REG_R14(%r8), %r14
movq TILE_REG_R15(%r8), %r15
// Load first two call parameters
movq TILE_REG_RDI(%r8), %rdi
movq TILE_REG_RSI(%r8), %rsi
// Load stack pointer
movq TILE_REG_RSP(%r8), %rsp
// Load instruction pointer, and jump
movq TILE_REG_RIP(%r8), %rcx
jmp *%rcx
#endif // defined(__x86_64__)

75
tile/fiber/detail/asm/ucontext_x64.h
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@ -1,75 +0,0 @@
#ifndef TILE_FIBER_DETAIL_ASM_UCONTEXT_X64_H
#define TILE_FIBER_DETAIL_ASM_UCONTEXT_X64_H
#pragma once
#define TILE_REG_RBX 0x00
#define TILE_REG_RBP 0x08
#define TILE_REG_R12 0x10
#define TILE_REG_R13 0x18
#define TILE_REG_R14 0x20
#define TILE_REG_R15 0x28
#define TILE_REG_RDI 0x30
#define TILE_REG_RSI 0x38
#define TILE_REG_RSP 0x40
#define TILE_REG_RIP 0x48
#if defined(__APPLE__)
#define TILE_ASM_SYMBOL(x) _##x
#else
#define TILE_ASM_SYMBOL(x) x
#endif
#ifndef TILE_BUILD_ASM
#include <stdint.h>
struct tile_ucontext_t {
// callee-saved registers
uintptr_t RBX;
uintptr_t RBP;
uintptr_t R12;
uintptr_t R13;
uintptr_t R14;
uintptr_t R15;
// parameter registers
uintptr_t RDI;
uintptr_t RSI;
// stack and instruction registers
uintptr_t RSP;
uintptr_t RIP;
};
#define TILE_UCONTEXT_ARG0(ctx, stack_top) (ctx)->RIP
#define TILE_UCONTEXT_ARG1(ctx, stack_top) (ctx)->RDI
#define TILE_UCONTEXT_ARG2(ctx, stack_top) (ctx)->RSI
#define TILE_UCONTEXT_ARG3(ctx, stack_top) (ctx)->RSP
#ifdef __cplusplus
#include <cstddef>
static_assert(offsetof(tile_ucontext_t, RBX) == TILE_REG_RBX,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, RBP) == TILE_REG_RBP,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, R12) == TILE_REG_R12,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, R13) == TILE_REG_R13,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, R14) == TILE_REG_R14,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, R15) == TILE_REG_R15,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, RDI) == TILE_REG_RDI,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, RSI) == TILE_REG_RSI,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, RSP) == TILE_REG_RSP,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, RIP) == TILE_REG_RIP,
"Bad register offset");
#endif // __cplusplus
#endif // TILE_BUILD_ASM
#endif // TILE_FIBER_DETAIL_ASM_UCONTEXT_X64_H

43
tile/fiber/detail/asm/ucontext_x86.S
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#if defined(__i386__)
#define TILE_BUILD_ASM 1
#include "tile/fiber/detail/asm/ucontext_x86.h"
// void tile_ucontext_swap(tile_ucontext_context* from, const tile_ucontext_context* to)
// esp+4: from
// esp+8: to
.text
.global tile_ucontext_swap
.align 4
tile_ucontext_swap:
// Save context 'from'
movl 4(%esp), %eax
// Store callee-preserved registers
movl %ebx, TILE_REG_EBX(%eax)
movl %ebp, TILE_REG_EBP(%eax)
movl %esi, TILE_REG_ESI(%eax)
movl %edi, TILE_REG_EDI(%eax)
movl (%esp), %ecx /* call stores the return address on the stack before jumping */
movl %ecx, TILE_REG_EIP(%eax)
lea 4(%esp), %ecx /* skip the pushed return address */
movl %ecx, TILE_REG_ESP(%eax)
// Load context 'to'
movl 8(%esp), %ecx
// Load callee-preserved registers
movl TILE_REG_EBX(%ecx), %ebx
movl TILE_REG_EBP(%ecx), %ebp
movl TILE_REG_ESI(%ecx), %esi
movl TILE_REG_EDI(%ecx), %edi
// Load stack pointer
movl TILE_REG_ESP(%ecx), %esp
// Load instruction pointer, and jump
movl TILE_REG_EIP(%ecx), %ecx
jmp *%ecx
#endif // defined(__i386__)

52
tile/fiber/detail/asm/ucontext_x86.h
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#ifndef TILE_FIBER_DETAIL_ASM_UCONTEXT_X86_H
#define TILE_FIBER_DETAIL_ASM_UCONTEXT_X86_H
#pragma once
#define TILE_REG_EBX 0x00
#define TILE_REG_EBP 0x04
#define TILE_REG_ESI 0x08
#define TILE_REG_EDI 0x0c
#define TILE_REG_ESP 0x10
#define TILE_REG_EIP 0x14
#ifndef TILE_BUILD_ASM
#include <stdint.h>
// Assumes cdecl calling convention.
// Registers EAX, ECX, and EDX are caller-saved, and the rest are callee-saved.
struct tile_ucontext_t {
// callee-saved registers
uintptr_t EBX;
uintptr_t EBP;
uintptr_t ESI;
uintptr_t EDI;
// stack and instruction registers
uintptr_t ESP;
uintptr_t EIP;
};
#define TILE_UCONTEXT_ARG0(ctx, stack_top) (ctx)->EIP
#define TILE_UCONTEXT_ARG1(ctx, stack_top) (ctx)->ESP
#define TILE_UCONTEXT_ARG2(ctx, stack_top) (stack_top)[-3]
#define TILE_UCONTEXT_ARG3(ctx, stack_top) (stack_top)[-4]
#ifdef __cplusplus
#include <cstddef>
static_assert(offsetof(tile_ucontext_t, EBX) == TILE_REG_EBX,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, EBP) == TILE_REG_EBP,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, ESI) == TILE_REG_ESI,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, EDI) == TILE_REG_EDI,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, ESP) == TILE_REG_ESP,
"Bad register offset");
static_assert(offsetof(tile_ucontext_t, EIP) == TILE_REG_EIP,
"Bad register offset");
#endif // __cplusplus
#endif // TILE_BUILD_ASM
#endif // TILE_FIBER_DETAIL_ASM_UCONTEXT_X86_H

1
tile/fiber/detail/fiber.cc
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#include "tile/base/logging.h"
#include "tile/base/make_unique.h"
#include "tile/base/object_pool.h"
#include "tile/fiber/detail/ucontext.h"
#include "nova/context/fcontext.h"

50
tile/fiber/detail/mutex.cc
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#include "tile/fiber/detail/mutex.h"
#include "tile/base/thread/unique_lock.h"
#include "tile/fiber/detail/os_fiber.h"
namespace tile {
namespace fiber {
namespace detail {
void Mutex::Lock() {
TILE_DCHECK(detail::IsFiberEnv());
if (TILE_LIKELY(TryLock())) {
return;
}
LockSlow();
}
bool Mutex::TryLock() {
TILE_DCHECK(detail::IsFiberEnv());
std::uint32_t expected = 0;
return count_.compare_exchange_strong(expected, 1, std::memory_order_acquire);
}
void Mutex::Unlock() {
TILE_CHECK(detail::IsFiberEnv());
auto was = count_.fetch_sub(1, std::memory_order_release);
if (was == 1) {
// lock success.
} else {
TILE_CHECK_GT(was, 1);
UniqueLock<Spinlock> splk(slow_path_lock_);
splk.Unlock();
}
}
void Mutex::LockSlow() {
TILE_DCHECK(detail::IsFiberEnv());
if (TryLock()) {
// lock success.
return;
}
UniqueLock<Spinlock> splk(slow_path_lock_);
if (count_.fetch_add(1, std::memory_order_acquire) == 0) {
// lock success.
return;
}
auto current = detail::OSFiber::Current();
}
} // namespace detail
} // namespace fiber
} // namespace tile

31
tile/fiber/detail/mutex.h
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#ifndef TILE_FIBER_MUTEX_H
#define TILE_FIBER_MUTEX_H
#pragma once
#include "tile/base/logging.h"
#include "tile/base/thread/spinlock.h"
#include <list>
namespace tile {
namespace fiber {
namespace detail {
class Mutex {
public:
void Lock();
bool TryLock();
void Unlock();
private:
void LockSlow();
private:
Spinlock slow_path_lock_;
std::atomic<std::uint32_t> count_{0};
};
} // namespace detail
} // namespace fiber
} // namespace tile
#endif // TILE_FIBER_MUTEX_H

58
tile/fiber/detail/ucontext.c
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#include "tile/fiber/detail/ucontext.h"
#include <assert.h>
#include <stddef.h>
#if defined(linux) || defined(__linux) || defined(__linux__)
#if defined(__aaarch64__)
#define TILE_USE_HWASAN 1
#endif
#endif
#ifndef TILE_USE_HWASAN
#define TILE_USE_HWASAN 0
#endif
// __attribute__((weak)) doesn't work on MacOS.
#if TILE_USE_HWASAN
// This is needed for HWSAan runtimes that don't have this commit:
// https://reviews.llvm.org/D149228.
__attribute__((weak)) void __hwasan_tag_memory(const volatile void *p,
unsigned char tag, size_t size);
__attribute((weak)) void *__hwasan_tag_pointer(const volatile void *p,
unsigned char tag);
#endif
void tile_ucontext_trampoline(void (*target)(void *), void *arg) {
target(arg);
}
void tile_ucontext_set_target(struct tile_ucontext_t *ctx, void *stack,
uint32_t stack_size, void (*target)(void *),
void *arg) {
#if TILE_USE_HWASAN
if (__hwasan_tag_memory && __hwasan_tag_pointer) {
stack = __hwasan_tag_pointer(stack, 0);
__hwasan_tag_memory(stack, 0, stack_size);
}
#endif
uintptr_t *stack_top = (uintptr_t *)((uint8_t *)(stack) + stack_size);
assert(((uintptr_t)stack_top & 15) == 0);
#if defined(__x86_64__)
TILE_UCONTEXT_ARG0(ctx, stack_top) = (uintptr_t)&tile_ucontext_trampoline;
TILE_UCONTEXT_ARG1(ctx, stack_top) = (uintptr_t)target;
TILE_UCONTEXT_ARG2(ctx, stack_top) = (uintptr_t)arg;
TILE_UCONTEXT_ARG3(ctx, stack_top) = (uintptr_t)&stack_top[-3];
stack_top[-2] = 0; // no return
#elif defined(__i386__)
TILE_UCONTEXT_ARG0(ctx, stack_top) = (uintptr_t)&tile_ucontext_trampoline;
TILE_UCONTEXT_ARG1(ctx, stack_top) = (uintptr_t)&stack_top[-5];
TILE_UCONTEXT_ARG2(ctx, stack_top) = (uintptr_t)arg;
TILE_UCONTEXT_ARG3(ctx, stack_top) = (uintptr_t)target;
stack_top[-5] = 0; // no return
#else
TILE_UCONTEXT_ARG0(ctx, stack_top) = (uintptr_t)&tile_ucontext_trampoline;
TILE_UCONTEXT_ARG1(ctx, stack_top) = (uintptr_t)target;
TILE_UCONTEXT_ARG2(ctx, stack_top) = (uintptr_t)arg;
TILE_UCONTEXT_ARG3(ctx, stack_top) = (uintptr_t)&stack_top;
#endif
}

43
tile/fiber/detail/ucontext.h
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#ifndef TILE_FIBER_DETAIL_UCONTEXT_H
#define TILE_FIBER_DETAIL_UCONTEXT_H
#pragma once
#include "tile/base/internal/macro.h"
#include <stdint.h>
#define HAVE_TILE_UCONTEXT 1
#if defined(__x86_64__)
#include "tile/fiber/detail/asm/ucontext_x64.h"
#elif defined(__i386__)
#include "tile/fiber/detail/asm/ucontext_x86.h"
#elif defined(__aarch64__)
#include "tile/fiber/detail/asm/ucontext_aarch64.h"
#elif defined(__arm__)
#include "tile/fiber/detail/asm/ucontext_arm.h"
#elif defined(__mips__) && _MIPS_SIM == _ABI64
#include "tile/fiber/detail/asm/ucontext_mips64.h"
#elif defined(__mips__) && _MIPS_SIM == _ABIO32
#include "tile/fiber/detail/asm/ucontext_mips32.h"
#elif defined(__riscv) && __riscv_xlen == 64
#include "tile/fiber/detail/asm/ucontext_riscv64.h"
#else
#undef HAVE_TILE_UCONTEXT
#define HAVE_TILE_UCONTEXT 0
#Error "Unsupported architecture"
#endif
#if defined(__cplusplus)
extern "C" {
#endif
void tile_ucontext_set_target(struct tile_ucontext_t *, void *stack_ptr,
uint32_t stack_szie, void (*target)(void *),
void *arg);
void tile_ucontext_swap(struct tile_ucontext_t *from,
struct tile_ucontext_t *to);
#if defined(__cplusplus)
}
#endif
#endif // TILE_FIBER_DETAIL_UCONTEXT_H