#ifndef DOWNLINK__3PARTY_TILE_TILE_BASE_MEMORY_BARRIER_H
#define DOWNLINK__3PARTY_TILE_TILE_BASE_MEMORY_BARRIER_H

#pragma once

#include <atomic>

namespace tile {
namespace internal {
inline void
CompilerBarrier()
{
    std::atomic_signal_fence(std::memory_order_seq_cst);
}

inline void
ReadBarrier()
{
    std::atomic_thread_fence(std::memory_order_seq_cst);
}

inline void
WriteBarrier()
{
    std::atomic_thread_fence(std::memory_order_seq_cst);
}

inline void
MemoryBarrier()
{
    std::atomic_thread_fence(std::memory_order_seq_cst);
}

inline void
AsymmetricBarrierLight()
{
    CompilerBarrier();
}

void AsymmetricBarrierHeavy();

}// namespace internal
}// namespace tile

#endif// DOWNLINK__3PARTY_TILE_TILE_BASE_MEMORY_BARRIER_H
