mirror of
https://github.com/ggml-org/llama.cpp.git
synced 2025-08-13 11:57:43 -04:00
* add conv2d kernel * fix trailing whitespace * whitespace fixe * handle f16 input and f16 kernel, more opt * resolve conflicts * use enqueue_ndrange_kernel
177 lines
6.5 KiB
Common Lisp
177 lines
6.5 KiB
Common Lisp
#pragma OPENCL EXTENSION cl_khr_fp16 : enable
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#if defined(cl_qcom_reqd_sub_group_size)
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#pragma OPENCL EXTENSION cl_qcom_reqd_sub_group_size : enable
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#define REQD_SUBGROUP_SIZE_128 __attribute__((qcom_reqd_sub_group_size("full")))
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#else
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#define REQD_SUBGROUP_SIZE_128
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#endif
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#define T_ACCUM float4
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#define VEC_SIZE 4
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#define BS_K 64
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#define BS_NPQ 64
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#define BS_CRS 16
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#define TS_K 4
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#define TS_NPQ 8
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#define WG_K (BS_K / TS_K)
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#define WG_NPQ (BS_NPQ / TS_NPQ)
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#define BS_NPQ_VEC (BS_NPQ / VEC_SIZE)
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#define TS_NPQ_VEC (TS_NPQ / VEC_SIZE)
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static inline uint splitWork(uint work_size, uint block_size){
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return (work_size + block_size - 1) / block_size;
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}
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REQD_SUBGROUP_SIZE_128
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kernel void kernel_conv_2d(
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global void* p_knl,
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ulong off_knl,
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global void* p_src,
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ulong off_src,
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global void* p_dst,
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ulong off_dst,
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local void* shared,
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uint Cout, uint Cin, uint N,
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uint KW, uint KH, uint W, uint H, uint OW, uint OH,
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uint s0, uint s1, uint p0, uint p1, uint d0, uint d1,
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uint nb01, uint nb02, uint nb03,
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uint nb11, uint nb12, uint nb13,
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uint nb1, uint nb2, uint nb3
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) {
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global half* knl_data = (global half*) ((global char*)p_knl + off_knl);
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global float* src_data = (global float*) ((global char*)p_src + off_src);
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global float* dst_data = (global float*) ((global char*)p_dst + off_dst);
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const uint K = Cout;
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const uint CRS = Cin*KH*KW;
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const uint NPQ = N*OH*OW;
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const uint lid_k = get_local_id(0);
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const uint lid_npq = get_local_id(1);
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const uint tid = lid_npq * WG_K + lid_k;
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const uint B_idx_K = get_group_id(0);
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const uint B_idx_NPQ = get_group_id(1);
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const uint offset_k = B_idx_K * BS_K;
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const uint offset_npq = B_idx_NPQ * BS_NPQ;
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local half* Ash = (local half*)shared;
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local float4* Bsh = (local float4*) &Ash[BS_K * BS_CRS];
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T_ACCUM regC[TS_K][TS_NPQ_VEC];
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for (int i = 0; i < TS_K; ++i) {
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for (int j = 0; j < TS_NPQ_VEC; ++j) {
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regC[i][j] = (T_ACCUM)(0.0f);
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}
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}
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const uint NB_CRS = splitWork(CRS, BS_CRS);
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for (uint B_idx_CRS = 0; B_idx_CRS < NB_CRS; ++B_idx_CRS) {
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const uint offset_crs = B_idx_CRS * BS_CRS;
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for (int i = tid; i < BS_K * BS_CRS; i += (WG_K * WG_NPQ)) {
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const uint k_l = i / BS_CRS;
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const uint crs_l = i % BS_CRS;
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const uint k_g = offset_k + k_l;
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const uint crs_g = offset_crs + crs_l;
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if (k_g < K && crs_g < CRS) {
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const uint Cin_idx = crs_g / (KW*KH);
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const uint KH_idx = (crs_g - Cin_idx*KW*KH) / KW;
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const uint KW_idx = crs_g - Cin_idx*KW*KH - KH_idx*KW;
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const uint knl_idx = KW_idx + KH_idx*nb01 + Cin_idx*nb02 + k_g*nb03;
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Ash[k_l * BS_CRS + crs_l] = knl_data[knl_idx];
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} else {
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Ash[k_l * BS_CRS + crs_l] = (half)0.0f;
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}
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}
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for (int i = tid; i < BS_CRS * BS_NPQ_VEC; i += (WG_K * WG_NPQ)) {
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const uint crs_l = i / BS_NPQ_VEC;
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const uint npq_l_vec = i % BS_NPQ_VEC;
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const uint crs_g = offset_crs + crs_l;
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float4 val = (float4)(0.0f);
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if (crs_g < CRS) {
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const uint Cin_idx = crs_g / (KW * KH);
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const uint KH_idx = (crs_g - Cin_idx * KW * KH) / KW;
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const uint KW_idx = crs_g - Cin_idx * KW * KH - KH_idx * KW;
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for (int v = 0; v < VEC_SIZE; ++v) {
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const uint npq_g = offset_npq + npq_l_vec * VEC_SIZE + v;
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if (npq_g < NPQ) {
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const uint N_idx = npq_g / (OH * OW);
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const uint pq_idx = npq_g % (OH * OW);
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const uint OH_idx = pq_idx / OW;
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const uint OW_idx = pq_idx % OW;
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const int H_idx = (int)(OH_idx * s1 + KH_idx * d1 - p1);
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const int W_idx = (int)(OW_idx * s0 + KW_idx * d0 - p0);
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if (H_idx >= 0 && H_idx < H && W_idx >= 0 && W_idx < W) {
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const uint src_idx = W_idx + H_idx * nb11 + Cin_idx * nb12 + N_idx * nb13;
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((float*)&val)[v] = src_data[src_idx];
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}
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}
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}
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}
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Bsh[crs_l * BS_NPQ_VEC + npq_l_vec] = val;
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}
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barrier(CLK_LOCAL_MEM_FENCE);
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#pragma unroll
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for (uint crs_l = 0; crs_l < BS_CRS; ++crs_l) {
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half regA[TS_K];
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for (uint k_l_reg = 0; k_l_reg < TS_K; ++k_l_reg) {
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regA[k_l_reg] = Ash[(lid_k * TS_K + k_l_reg) * BS_CRS + crs_l];
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}
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for (uint npq_l_vec_reg = 0; npq_l_vec_reg < TS_NPQ_VEC; ++npq_l_vec_reg) {
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float4 regB = Bsh[crs_l * BS_NPQ_VEC + lid_npq * TS_NPQ_VEC + npq_l_vec_reg];
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for (uint k_l_reg = 0; k_l_reg < TS_K; ++k_l_reg) {
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regC[k_l_reg][npq_l_vec_reg] = mad(convert_float(regA[k_l_reg]), regB, regC[k_l_reg][npq_l_vec_reg]);
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}
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}
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}
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barrier(CLK_LOCAL_MEM_FENCE);
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}
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for (uint k_l_reg = 0; k_l_reg < TS_K; ++k_l_reg) {
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const uint k_g = offset_k + lid_k * TS_K + k_l_reg;
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if (k_g >= K) continue;
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for (uint npq_l_vec_reg = 0; npq_l_vec_reg < TS_NPQ_VEC; ++npq_l_vec_reg) {
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const uint npq_g_base = offset_npq + (lid_npq * TS_NPQ_VEC + npq_l_vec_reg) * VEC_SIZE;
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const uint N_idx = npq_g_base / (OH * OW);
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const uint pq_idx = npq_g_base % (OH * OW);
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const uint OH_idx = pq_idx / OW;
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const uint OW_idx = pq_idx % OW;
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if (nb1 == OW && OW_idx + VEC_SIZE <= OW && npq_g_base + VEC_SIZE <= NPQ) {
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const uint dst_idx = OW_idx + OH_idx*nb1 + k_g*nb2 + N_idx*nb3;
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vstore4(regC[k_l_reg][npq_l_vec_reg], 0, &dst_data[dst_idx]);
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} else {
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T_ACCUM res = regC[k_l_reg][npq_l_vec_reg];
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for (int v = 0; v < VEC_SIZE; ++v) {
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const uint npq_g = npq_g_base + v;
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if (npq_g < NPQ) {
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const uint N_idx_s = npq_g / (OH*OW);
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const uint pq_idx_s = npq_g % (OH*OW);
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const uint OH_idx_s = pq_idx_s / OW;
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const uint OW_idx_s = pq_idx_s % OW;
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const uint dst_idx_s = OW_idx_s + OH_idx_s*nb1 + k_g*nb2 + N_idx_s*nb3;
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dst_data[dst_idx_s] = ((float*)&res)[v];
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}
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}
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}
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}
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}
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}
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