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synced 2025-08-13 11:57:43 -04:00
ggml-cpu: add ggml fp16->fp32 and fp32->fp16 scalar simd
Signed-off-by: Aaron Teo <aaron.teo1@ibm.com>
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@@ -982,8 +982,8 @@ static inline float32x4_t __lzs_f16cx4_load(const ggml_fp16_t * x) {
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static inline void __lzs_f16cx4_store(ggml_fp16_t * x, float32x4_t v_y) {
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#ifdef __NNPA__
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float32x4_t zero = vec_splats(0.0f);
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uint16x8_t v_x = vec_round_from_fp32(v_y, zero, 0);
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float32x4_t v_zero = vec_splats(0.0f);
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uint16x8_t v_x = vec_round_from_fp32(v_y, v_zero, 0);
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x[0] = vec_extract(v_x, 0);
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x[1] = vec_extract(v_x, 1);
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x[2] = vec_extract(v_x, 2);
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@@ -322,6 +322,7 @@ GGML_API void ggml_aligned_free(void * ptr, size_t size);
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// 16-bit float
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// on Arm, we use __fp16
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// on x86, we use uint16_t
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// on s390x, we use ZDNN_DLFLOAT16 with NNPA
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//
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// for old CUDA compilers (<= 11), we use uint16_t: ref https://github.com/ggml-org/llama.cpp/pull/10616
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// for MUSA compilers , we use uint16_t: ref https://github.com/ggml-org/llama.cpp/pull/11843
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@@ -417,6 +418,29 @@ GGML_API void ggml_aligned_free(void * ptr, size_t size);
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#define GGML_FP16_TO_FP32(x) GGML_COMPUTE_FP16_TO_FP32(x)
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#define GGML_FP32_TO_FP16(x) GGML_COMPUTE_FP32_TO_FP16(x)
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#elif defined(__NNPA__)
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#define GGML_COMPUTE_FP16_TO_FP32(x) ggml_compute_fp16_to_fp32(x)
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#define GGML_COMPUTE_FP32_TO_FP16(x) ggml_compute_fp32_to_fp16(x)
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#define GGML_FP16_TO_FP32(x) GGML_COMPUTE_FP16_TO_FP32(x)
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#define GGML_FP32_TO_FP16(x) GGML_COMPUTE_FP32_TO_FP16(x)
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// TODO: Determine if inline assembly is faster
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static inline float ggml_compute_fp16_to_fp32(ggml_fp16_t h) {
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uint16x8_t v_h = vec_splats(h);
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uint16x8_t nnpa_dlf16 = vec_convert_from_fp16(v_h, 0);
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return vec_extend_to_fp32_hi(nnpa_dlf16, 0)[0];
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}
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// TODO: Determine if inline assembly is faster
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static inline ggml_fp16_t ggml_compute_fp32_to_fp16(float f) {
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float32x4_t v_f = vec_splats(f);
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float32x4_t v_zero = vec_splats(0.0f);
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uint16x8_t v_h = vec_round_from_fp32(v_f, v_zero, 0);
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return vec_extract(v_h, 0);
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}
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#else
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// FP16 <-> FP32
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