mirror of
https://github.com/ggml-org/llama.cpp.git
synced 2025-08-01 15:09:32 -04:00
ggml : implement REGLU/GEGLU/SWIGLU ops (#14158)
* implement unary REGLU/GEGLU/SWIGLU cpu ops * relax constraints * duplicate shape of source * fix ggml_vec_geglu_f16 * special case gated ops * implement unary REGLU/GEGLU/SWIGLU cuda ops * tighten constraints again * refactor into GGML_GLU_OP * metal : add glu kernels ggml-ci * add CUDA_GLU_BLOCK_SIZE [no ci] * more constraints and use 64bit ints ggml-ci * 64bit multiplication [no ci] * implement swapped variants (cpu/cuda) * update comment [no ci] ggml-ci * Vulkan: Add GLU ops and shaders * SYCL: Implement fused kernel GEGLU, SWIGLU and REGLU for single up+gate * ggml : implement GLU for split up/gate (#14181) * implement GLU for split up/gate * add tests for ggml_glu_split * Vulkan: Implement glu_split logic and shader support * add split to logging [no ci] * SYCL: refactor element_size ops and add split up and gate support to gated kernels * SYCL: switch GEGLU to use tanh approximation --------- Co-authored-by: 0cc4m <picard12@live.de> Co-authored-by: Akarshan <akarshan@menlo.ai> * GGML: increase OP count in assertion * Refactor: Optimize SYCL element-wise operations with unary function inlining This commit refactors the SYCL element-wise operations to improve performance by: - Inlining unary operations (sgn, abs, elu, gelu, silu, etc.) to reduce kernel launch overhead. - Introducing helper functions `op_xxx` for each unary operation to encapsulate the logic. - Replacing direct kernel calls with calls to these inlined functions. - Using `__dpct_inline__` to encourage compiler inlining. - Minor code cleanup and consistency improvements. The changes aim to reduce kernel launch overhead and improve the overall efficiency of element-wise operations on SYCL devices. * vulkan: Increase workgroup size for GLU, for performance (#14345) * vulkan: Increase workgroup size for GLU, for performance * vulkan: change GLU shaders to do one element per invocation rather than one row per workgroup * merge fix * metal : add support for split and swap ggml-ci --------- Co-authored-by: Georgi Gerganov <ggerganov@gmail.com> Co-authored-by: 0cc4m <picard12@live.de> Co-authored-by: Akarshan <akarshan@menlo.ai> Co-authored-by: Jeff Bolz <jbolz@nvidia.com>
This commit is contained in:
@@ -2303,6 +2303,21 @@ static bool ggml_cuda_compute_forward(ggml_backend_cuda_context & ctx, struct gg
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return false;
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}
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break;
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case GGML_OP_GLU:
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switch (ggml_get_glu_op(dst)) {
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case GGML_GLU_OP_REGLU:
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ggml_cuda_op_reglu(ctx, dst);
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break;
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case GGML_GLU_OP_GEGLU:
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ggml_cuda_op_geglu(ctx, dst);
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break;
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case GGML_GLU_OP_SWIGLU:
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ggml_cuda_op_swiglu(ctx, dst);
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break;
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default:
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return false;
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}
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break;
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case GGML_OP_NORM:
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ggml_cuda_op_norm(ctx, dst);
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break;
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@@ -3096,6 +3111,16 @@ static bool ggml_backend_cuda_device_supports_op(ggml_backend_dev_t dev, const g
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return false;
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}
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break;
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case GGML_OP_GLU:
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switch (ggml_get_glu_op(op)) {
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case GGML_GLU_OP_REGLU:
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case GGML_GLU_OP_GEGLU:
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case GGML_GLU_OP_SWIGLU:
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return ggml_is_contiguous_1(op->src[0]);
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default:
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return false;
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}
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break;
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case GGML_OP_MUL_MAT:
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case GGML_OP_MUL_MAT_ID:
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{
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@@ -196,6 +196,95 @@ void ggml_cuda_op_log(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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ggml_cuda_op_unary<op_log>(ctx, dst);
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}
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/* gated ops */
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template <float (*op)(float), typename T>
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static __global__ void unary_gated_op_kernel(const T * x, const T * g, T * dst, const int64_t k, const int64_t n, const int64_t o0, const int64_t o1) {
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const int64_t i = int64_t(blockDim.x)*blockIdx.x + threadIdx.x;
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if (i >= k) {
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return;
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}
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// perform base op and multiply with gate (either offset in same tensor or a separate one)
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const int64_t j0 = (i / n) * o0 + (i % n);
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const int64_t j1 = o0 == o1 ? j0 : (i / n) * o1 + (i % n);
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dst[i] = (T)(op((float)x[j0]) * (float)g[j1]);
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}
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template <float (*op)(float), typename T>
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static void unary_gated_cuda(const T * x, const T * g, T * dst, const int64_t k, const int64_t n, const int64_t o0, const int64_t o1, cudaStream_t stream) {
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const int64_t num_blocks = (k + CUDA_GLU_BLOCK_SIZE - 1) / CUDA_GLU_BLOCK_SIZE;
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unary_gated_op_kernel<op><<<num_blocks, CUDA_GLU_BLOCK_SIZE, 0, stream>>>(x, g, dst, k, n, o0, o1);
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}
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template <float (*op)(float)>
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void ggml_cuda_op_unary_gated(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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const ggml_tensor * src0 = dst->src[0];
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const ggml_tensor * src1 = dst->src[1];
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void * src0_d = src0->data;
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void * src1_d = src1 ? src1->data : src0->data;
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const int64_t src0_o = src0->nb[1];
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const int64_t src1_o = src1 ? src1->nb[1] : src0->nb[1];
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void * dst_d = dst->data;
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const int64_t nc = src1 ? src0->ne[0] : src0->ne[0] / 2;
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cudaStream_t stream = ctx.stream();
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GGML_ASSERT(ggml_is_contiguous_1(src0));
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GGML_ASSERT(src0->nb[0] == ggml_element_size(src0));
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GGML_ASSERT(ggml_is_contiguous(dst));
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GGML_ASSERT(src0->type == GGML_TYPE_F32 || src0->type == GGML_TYPE_F16);
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GGML_ASSERT( dst->type == GGML_TYPE_F32 || dst->type == GGML_TYPE_F16);
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GGML_ASSERT(src0->type == dst->type);
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GGML_ASSERT(dst->ne[0] == nc);
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GGML_ASSERT(ggml_nrows(dst) == ggml_nrows(src0));
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if (src1) {
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GGML_ASSERT(ggml_is_contiguous_1(src1));
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GGML_ASSERT(src1->nb[0] == ggml_element_size(src1));
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GGML_ASSERT(src1->ne[0] == nc);
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GGML_ASSERT(src0->type == src1->type);
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}
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const int32_t swapped = ((const int32_t *) dst->op_params)[1];
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if (src0->type == GGML_TYPE_F16) {
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half * src0_p = (half *) src0_d;
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half * src1_p = (half *) src1_d;
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if (!src1) {
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src0_p += swapped ? nc : 0;
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src1_p += swapped ? 0 : nc;
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}
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unary_gated_cuda<op>(src0_p, src1_p, (half *)dst_d, ggml_nelements(dst), nc, src0_o / sizeof(half), src1_o / sizeof(half), stream);
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} else {
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float * src0_p = (float *) src0_d;
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float * src1_p = (float *) src1_d;
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if (!src1) {
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src0_p += swapped ? nc : 0;
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src1_p += swapped ? 0 : nc;
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}
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unary_gated_cuda<op>(src0_p, src1_p, (float *)dst_d, ggml_nelements(dst), nc, src0_o / sizeof(float), src1_o / sizeof(float), stream);
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}
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}
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void ggml_cuda_op_reglu(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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ggml_cuda_op_unary_gated<op_relu>(ctx, dst);
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}
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void ggml_cuda_op_geglu(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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ggml_cuda_op_unary_gated<op_gelu>(ctx, dst);
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}
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void ggml_cuda_op_swiglu(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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ggml_cuda_op_unary_gated<op_silu>(ctx, dst);
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}
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/* silu_back */
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static __device__ __forceinline__ float op_silu_back(float grad, float x) {
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@@ -15,6 +15,7 @@
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#define CUDA_SQRT_BLOCK_SIZE 256
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#define CUDA_SIN_BLOCK_SIZE 256
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#define CUDA_COS_BLOCK_SIZE 256
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#define CUDA_GLU_BLOCK_SIZE 256
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void ggml_cuda_op_abs(ggml_backend_cuda_context & ctx, ggml_tensor * dst);
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@@ -57,3 +58,9 @@ void ggml_cuda_op_sin(ggml_backend_cuda_context & ctx, ggml_tensor * dst);
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void ggml_cuda_op_cos(ggml_backend_cuda_context & ctx, ggml_tensor * dst);
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void ggml_cuda_op_log(ggml_backend_cuda_context & ctx, ggml_tensor * dst);
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void ggml_cuda_op_reglu(ggml_backend_cuda_context & ctx, ggml_tensor * dst);
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void ggml_cuda_op_geglu(ggml_backend_cuda_context & ctx, ggml_tensor * dst);
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void ggml_cuda_op_swiglu(ggml_backend_cuda_context & ctx, ggml_tensor * dst);
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