323 lines
8.5 KiB
C
323 lines
8.5 KiB
C
{
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"masking, test out of bounds 1",
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.insns = {
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BPF_MOV32_IMM(BPF_REG_1, 5),
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BPF_MOV32_IMM(BPF_REG_2, 5 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test out of bounds 2",
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.insns = {
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BPF_MOV32_IMM(BPF_REG_1, 1),
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BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test out of bounds 3",
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.insns = {
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BPF_MOV32_IMM(BPF_REG_1, 0xffffffff),
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BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test out of bounds 4",
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.insns = {
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BPF_MOV32_IMM(BPF_REG_1, 0xffffffff),
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BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test out of bounds 5",
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.insns = {
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BPF_MOV32_IMM(BPF_REG_1, -1),
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BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test out of bounds 6",
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.insns = {
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BPF_MOV32_IMM(BPF_REG_1, -1),
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BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test out of bounds 7",
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.insns = {
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BPF_MOV64_IMM(BPF_REG_1, 5),
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BPF_MOV32_IMM(BPF_REG_2, 5 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test out of bounds 8",
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.insns = {
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BPF_MOV64_IMM(BPF_REG_1, 1),
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BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test out of bounds 9",
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.insns = {
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BPF_MOV64_IMM(BPF_REG_1, 0xffffffff),
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BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test out of bounds 10",
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.insns = {
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BPF_MOV64_IMM(BPF_REG_1, 0xffffffff),
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BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test out of bounds 11",
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.insns = {
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BPF_MOV64_IMM(BPF_REG_1, -1),
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BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test out of bounds 12",
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.insns = {
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BPF_MOV64_IMM(BPF_REG_1, -1),
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BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test in bounds 1",
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.insns = {
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BPF_MOV32_IMM(BPF_REG_1, 4),
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BPF_MOV32_IMM(BPF_REG_2, 5 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 4,
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},
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{
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"masking, test in bounds 2",
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.insns = {
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BPF_MOV32_IMM(BPF_REG_1, 0),
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BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test in bounds 3",
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.insns = {
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BPF_MOV32_IMM(BPF_REG_1, 0xfffffffe),
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BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0xfffffffe,
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},
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{
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"masking, test in bounds 4",
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.insns = {
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BPF_MOV32_IMM(BPF_REG_1, 0xabcde),
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BPF_MOV32_IMM(BPF_REG_2, 0xabcdef - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0xabcde,
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},
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{
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"masking, test in bounds 5",
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.insns = {
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BPF_MOV32_IMM(BPF_REG_1, 0),
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BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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{
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"masking, test in bounds 6",
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.insns = {
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BPF_MOV32_IMM(BPF_REG_1, 46),
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BPF_MOV32_IMM(BPF_REG_2, 47 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 46,
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},
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{
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"masking, test in bounds 7",
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.insns = {
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BPF_MOV64_IMM(BPF_REG_3, -46),
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BPF_ALU64_IMM(BPF_MUL, BPF_REG_3, -1),
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BPF_MOV32_IMM(BPF_REG_2, 47 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_3),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_3),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_3, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_3),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 46,
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},
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{
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"masking, test in bounds 8",
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.insns = {
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BPF_MOV64_IMM(BPF_REG_3, -47),
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BPF_ALU64_IMM(BPF_MUL, BPF_REG_3, -1),
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BPF_MOV32_IMM(BPF_REG_2, 47 - 1),
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_3),
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_3),
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
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BPF_ALU64_REG(BPF_AND, BPF_REG_3, BPF_REG_2),
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_3),
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BPF_EXIT_INSN(),
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},
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.result = ACCEPT,
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.retval = 0,
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},
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