731 lines
21 KiB
C
731 lines
21 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Thermal throttle event support code (such as syslog messaging and rate
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* limiting) that was factored out from x86_64 (mce_intel.c) and i386 (p4.c).
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*
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* This allows consistent reporting of CPU thermal throttle events.
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*
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* Maintains a counter in /sys that keeps track of the number of thermal
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* events, such that the user knows how bad the thermal problem might be
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* (since the logging to syslog is rate limited).
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*
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* Author: Dmitriy Zavin (dmitriyz@google.com)
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*
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* Credits: Adapted from Zwane Mwaikambo's original code in mce_intel.c.
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* Inspired by Ross Biro's and Al Borchers' counter code.
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*/
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#include <linux/interrupt.h>
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#include <linux/notifier.h>
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#include <linux/jiffies.h>
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#include <linux/kernel.h>
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#include <linux/percpu.h>
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#include <linux/export.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/cpu.h>
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#include <asm/processor.h>
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#include <asm/thermal.h>
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#include <asm/traps.h>
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#include <asm/apic.h>
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#include <asm/irq.h>
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#include <asm/msr.h>
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#include "thermal_interrupt.h"
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/* How long to wait between reporting thermal events */
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#define CHECK_INTERVAL (300 * HZ)
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#define THERMAL_THROTTLING_EVENT 0
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#define POWER_LIMIT_EVENT 1
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/**
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* struct _thermal_state - Represent the current thermal event state
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* @next_check: Stores the next timestamp, when it is allowed
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* to log the next warning message.
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* @last_interrupt_time: Stores the timestamp for the last threshold
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* high event.
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* @therm_work: Delayed workqueue structure
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* @count: Stores the current running count for thermal
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* or power threshold interrupts.
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* @last_count: Stores the previous running count for thermal
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* or power threshold interrupts.
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* @max_time_ms: This shows the maximum amount of time CPU was
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* in throttled state for a single thermal
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* threshold high to low state.
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* @total_time_ms: This is a cumulative time during which CPU was
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* in the throttled state.
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* @rate_control_active: Set when a throttling message is logged.
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* This is used for the purpose of rate-control.
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* @new_event: Stores the last high/low status of the
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* THERM_STATUS_PROCHOT or
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* THERM_STATUS_POWER_LIMIT.
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* @level: Stores whether this _thermal_state instance is
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* for a CORE level or for PACKAGE level.
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* @sample_index: Index for storing the next sample in the buffer
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* temp_samples[].
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* @sample_count: Total number of samples collected in the buffer
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* temp_samples[].
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* @average: The last moving average of temperature samples
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* @baseline_temp: Temperature at which thermal threshold high
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* interrupt was generated.
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* @temp_samples: Storage for temperature samples to calculate
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* moving average.
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*
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* This structure is used to represent data related to thermal state for a CPU.
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* There is a separate storage for core and package level for each CPU.
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*/
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struct _thermal_state {
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u64 next_check;
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u64 last_interrupt_time;
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struct delayed_work therm_work;
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unsigned long count;
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unsigned long last_count;
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unsigned long max_time_ms;
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unsigned long total_time_ms;
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bool rate_control_active;
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bool new_event;
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u8 level;
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u8 sample_index;
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u8 sample_count;
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u8 average;
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u8 baseline_temp;
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u8 temp_samples[3];
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};
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struct thermal_state {
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struct _thermal_state core_throttle;
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struct _thermal_state core_power_limit;
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struct _thermal_state package_throttle;
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struct _thermal_state package_power_limit;
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struct _thermal_state core_thresh0;
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struct _thermal_state core_thresh1;
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struct _thermal_state pkg_thresh0;
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struct _thermal_state pkg_thresh1;
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};
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/* Callback to handle core threshold interrupts */
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int (*platform_thermal_notify)(__u64 msr_val);
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EXPORT_SYMBOL(platform_thermal_notify);
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/* Callback to handle core package threshold_interrupts */
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int (*platform_thermal_package_notify)(__u64 msr_val);
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EXPORT_SYMBOL_GPL(platform_thermal_package_notify);
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/* Callback support of rate control, return true, if
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* callback has rate control */
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bool (*platform_thermal_package_rate_control)(void);
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EXPORT_SYMBOL_GPL(platform_thermal_package_rate_control);
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static DEFINE_PER_CPU(struct thermal_state, thermal_state);
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static atomic_t therm_throt_en = ATOMIC_INIT(0);
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static u32 lvtthmr_init __read_mostly;
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#ifdef CONFIG_SYSFS
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#define define_therm_throt_device_one_ro(_name) \
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static DEVICE_ATTR(_name, 0444, \
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therm_throt_device_show_##_name, \
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NULL) \
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#define define_therm_throt_device_show_func(event, name) \
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\
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static ssize_t therm_throt_device_show_##event##_##name( \
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struct device *dev, \
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struct device_attribute *attr, \
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char *buf) \
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{ \
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unsigned int cpu = dev->id; \
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ssize_t ret; \
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\
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preempt_disable(); /* CPU hotplug */ \
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if (cpu_online(cpu)) { \
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ret = sprintf(buf, "%lu\n", \
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per_cpu(thermal_state, cpu).event.name); \
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} else \
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ret = 0; \
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preempt_enable(); \
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\
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return ret; \
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}
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define_therm_throt_device_show_func(core_throttle, count);
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define_therm_throt_device_one_ro(core_throttle_count);
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define_therm_throt_device_show_func(core_power_limit, count);
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define_therm_throt_device_one_ro(core_power_limit_count);
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define_therm_throt_device_show_func(package_throttle, count);
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define_therm_throt_device_one_ro(package_throttle_count);
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define_therm_throt_device_show_func(package_power_limit, count);
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define_therm_throt_device_one_ro(package_power_limit_count);
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define_therm_throt_device_show_func(core_throttle, max_time_ms);
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define_therm_throt_device_one_ro(core_throttle_max_time_ms);
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define_therm_throt_device_show_func(package_throttle, max_time_ms);
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define_therm_throt_device_one_ro(package_throttle_max_time_ms);
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define_therm_throt_device_show_func(core_throttle, total_time_ms);
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define_therm_throt_device_one_ro(core_throttle_total_time_ms);
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define_therm_throt_device_show_func(package_throttle, total_time_ms);
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define_therm_throt_device_one_ro(package_throttle_total_time_ms);
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static struct attribute *thermal_throttle_attrs[] = {
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&dev_attr_core_throttle_count.attr,
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&dev_attr_core_throttle_max_time_ms.attr,
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&dev_attr_core_throttle_total_time_ms.attr,
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NULL
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};
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static const struct attribute_group thermal_attr_group = {
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.attrs = thermal_throttle_attrs,
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.name = "thermal_throttle"
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};
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#endif /* CONFIG_SYSFS */
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#define CORE_LEVEL 0
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#define PACKAGE_LEVEL 1
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#define THERM_THROT_POLL_INTERVAL HZ
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#define THERM_STATUS_PROCHOT_LOG BIT(1)
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#define THERM_STATUS_CLEAR_CORE_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11) | BIT(13) | BIT(15))
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#define THERM_STATUS_CLEAR_PKG_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11))
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static void clear_therm_status_log(int level)
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{
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int msr;
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u64 mask, msr_val;
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if (level == CORE_LEVEL) {
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msr = MSR_IA32_THERM_STATUS;
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mask = THERM_STATUS_CLEAR_CORE_MASK;
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} else {
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msr = MSR_IA32_PACKAGE_THERM_STATUS;
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mask = THERM_STATUS_CLEAR_PKG_MASK;
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}
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rdmsrl(msr, msr_val);
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msr_val &= mask;
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wrmsrl(msr, msr_val & ~THERM_STATUS_PROCHOT_LOG);
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}
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static void get_therm_status(int level, bool *proc_hot, u8 *temp)
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{
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int msr;
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u64 msr_val;
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if (level == CORE_LEVEL)
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msr = MSR_IA32_THERM_STATUS;
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else
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msr = MSR_IA32_PACKAGE_THERM_STATUS;
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rdmsrl(msr, msr_val);
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if (msr_val & THERM_STATUS_PROCHOT_LOG)
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*proc_hot = true;
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else
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*proc_hot = false;
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*temp = (msr_val >> 16) & 0x7F;
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}
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static void __maybe_unused throttle_active_work(struct work_struct *work)
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{
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struct _thermal_state *state = container_of(to_delayed_work(work),
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struct _thermal_state, therm_work);
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unsigned int i, avg, this_cpu = smp_processor_id();
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u64 now = get_jiffies_64();
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bool hot;
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u8 temp;
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get_therm_status(state->level, &hot, &temp);
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/* temperature value is offset from the max so lesser means hotter */
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if (!hot && temp > state->baseline_temp) {
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if (state->rate_control_active)
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pr_info("CPU%d: %s temperature/speed normal (total events = %lu)\n",
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this_cpu,
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state->level == CORE_LEVEL ? "Core" : "Package",
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state->count);
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state->rate_control_active = false;
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return;
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}
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if (time_before64(now, state->next_check) &&
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state->rate_control_active)
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goto re_arm;
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state->next_check = now + CHECK_INTERVAL;
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if (state->count != state->last_count) {
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/* There was one new thermal interrupt */
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state->last_count = state->count;
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state->average = 0;
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state->sample_count = 0;
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state->sample_index = 0;
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}
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state->temp_samples[state->sample_index] = temp;
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state->sample_count++;
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state->sample_index = (state->sample_index + 1) % ARRAY_SIZE(state->temp_samples);
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if (state->sample_count < ARRAY_SIZE(state->temp_samples))
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goto re_arm;
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avg = 0;
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for (i = 0; i < ARRAY_SIZE(state->temp_samples); ++i)
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avg += state->temp_samples[i];
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avg /= ARRAY_SIZE(state->temp_samples);
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if (state->average > avg) {
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pr_warn("CPU%d: %s temperature is above threshold, cpu clock is throttled (total events = %lu)\n",
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this_cpu,
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state->level == CORE_LEVEL ? "Core" : "Package",
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state->count);
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state->rate_control_active = true;
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}
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state->average = avg;
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re_arm:
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clear_therm_status_log(state->level);
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schedule_delayed_work_on(this_cpu, &state->therm_work, THERM_THROT_POLL_INTERVAL);
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}
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/***
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* therm_throt_process - Process thermal throttling event from interrupt
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* @curr: Whether the condition is current or not (boolean), since the
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* thermal interrupt normally gets called both when the thermal
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* event begins and once the event has ended.
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*
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* This function is called by the thermal interrupt after the
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* IRQ has been acknowledged.
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*
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* It will take care of rate limiting and printing messages to the syslog.
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*/
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static void therm_throt_process(bool new_event, int event, int level)
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{
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struct _thermal_state *state;
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unsigned int this_cpu = smp_processor_id();
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bool old_event;
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u64 now;
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struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
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now = get_jiffies_64();
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if (level == CORE_LEVEL) {
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if (event == THERMAL_THROTTLING_EVENT)
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state = &pstate->core_throttle;
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else if (event == POWER_LIMIT_EVENT)
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state = &pstate->core_power_limit;
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else
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return;
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} else if (level == PACKAGE_LEVEL) {
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if (event == THERMAL_THROTTLING_EVENT)
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state = &pstate->package_throttle;
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else if (event == POWER_LIMIT_EVENT)
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state = &pstate->package_power_limit;
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else
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return;
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} else
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return;
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old_event = state->new_event;
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state->new_event = new_event;
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if (new_event)
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state->count++;
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if (event != THERMAL_THROTTLING_EVENT)
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return;
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if (new_event && !state->last_interrupt_time) {
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bool hot;
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u8 temp;
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get_therm_status(state->level, &hot, &temp);
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/*
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* Ignore short temperature spike as the system is not close
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* to PROCHOT. 10C offset is large enough to ignore. It is
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* already dropped from the high threshold temperature.
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*/
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if (temp > 10)
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return;
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state->baseline_temp = temp;
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state->last_interrupt_time = now;
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schedule_delayed_work_on(this_cpu, &state->therm_work, THERM_THROT_POLL_INTERVAL);
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} else if (old_event && state->last_interrupt_time) {
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unsigned long throttle_time;
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throttle_time = jiffies_delta_to_msecs(now - state->last_interrupt_time);
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if (throttle_time > state->max_time_ms)
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state->max_time_ms = throttle_time;
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state->total_time_ms += throttle_time;
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state->last_interrupt_time = 0;
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}
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}
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static int thresh_event_valid(int level, int event)
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{
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struct _thermal_state *state;
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unsigned int this_cpu = smp_processor_id();
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struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu);
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u64 now = get_jiffies_64();
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if (level == PACKAGE_LEVEL)
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state = (event == 0) ? &pstate->pkg_thresh0 :
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&pstate->pkg_thresh1;
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else
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state = (event == 0) ? &pstate->core_thresh0 :
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&pstate->core_thresh1;
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if (time_before64(now, state->next_check))
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return 0;
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state->next_check = now + CHECK_INTERVAL;
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return 1;
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}
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static bool int_pln_enable;
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static int __init int_pln_enable_setup(char *s)
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{
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int_pln_enable = true;
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return 1;
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}
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__setup("int_pln_enable", int_pln_enable_setup);
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#ifdef CONFIG_SYSFS
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/* Add/Remove thermal_throttle interface for CPU device: */
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static int thermal_throttle_add_dev(struct device *dev, unsigned int cpu)
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{
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int err;
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struct cpuinfo_x86 *c = &cpu_data(cpu);
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err = sysfs_create_group(&dev->kobj, &thermal_attr_group);
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if (err)
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return err;
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if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable) {
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err = sysfs_add_file_to_group(&dev->kobj,
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&dev_attr_core_power_limit_count.attr,
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thermal_attr_group.name);
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if (err)
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goto del_group;
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}
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if (cpu_has(c, X86_FEATURE_PTS)) {
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err = sysfs_add_file_to_group(&dev->kobj,
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&dev_attr_package_throttle_count.attr,
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thermal_attr_group.name);
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if (err)
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goto del_group;
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err = sysfs_add_file_to_group(&dev->kobj,
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&dev_attr_package_throttle_max_time_ms.attr,
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thermal_attr_group.name);
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if (err)
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goto del_group;
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err = sysfs_add_file_to_group(&dev->kobj,
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&dev_attr_package_throttle_total_time_ms.attr,
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thermal_attr_group.name);
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if (err)
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goto del_group;
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if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable) {
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err = sysfs_add_file_to_group(&dev->kobj,
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&dev_attr_package_power_limit_count.attr,
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thermal_attr_group.name);
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if (err)
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goto del_group;
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}
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}
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return 0;
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del_group:
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sysfs_remove_group(&dev->kobj, &thermal_attr_group);
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return err;
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}
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static void thermal_throttle_remove_dev(struct device *dev)
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{
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sysfs_remove_group(&dev->kobj, &thermal_attr_group);
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}
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/* Get notified when a cpu comes on/off. Be hotplug friendly. */
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static int thermal_throttle_online(unsigned int cpu)
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{
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struct thermal_state *state = &per_cpu(thermal_state, cpu);
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struct device *dev = get_cpu_device(cpu);
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u32 l;
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state->package_throttle.level = PACKAGE_LEVEL;
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state->core_throttle.level = CORE_LEVEL;
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INIT_DELAYED_WORK(&state->package_throttle.therm_work, throttle_active_work);
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INIT_DELAYED_WORK(&state->core_throttle.therm_work, throttle_active_work);
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/* Unmask the thermal vector after the above workqueues are initialized. */
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l = apic_read(APIC_LVTTHMR);
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apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
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return thermal_throttle_add_dev(dev, cpu);
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}
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|
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static int thermal_throttle_offline(unsigned int cpu)
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|
{
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struct thermal_state *state = &per_cpu(thermal_state, cpu);
|
|
struct device *dev = get_cpu_device(cpu);
|
|
u32 l;
|
|
|
|
/* Mask the thermal vector before draining evtl. pending work */
|
|
l = apic_read(APIC_LVTTHMR);
|
|
apic_write(APIC_LVTTHMR, l | APIC_LVT_MASKED);
|
|
|
|
cancel_delayed_work_sync(&state->package_throttle.therm_work);
|
|
cancel_delayed_work_sync(&state->core_throttle.therm_work);
|
|
|
|
state->package_throttle.rate_control_active = false;
|
|
state->core_throttle.rate_control_active = false;
|
|
|
|
thermal_throttle_remove_dev(dev);
|
|
return 0;
|
|
}
|
|
|
|
static __init int thermal_throttle_init_device(void)
|
|
{
|
|
int ret;
|
|
|
|
if (!atomic_read(&therm_throt_en))
|
|
return 0;
|
|
|
|
ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/therm:online",
|
|
thermal_throttle_online,
|
|
thermal_throttle_offline);
|
|
return ret < 0 ? ret : 0;
|
|
}
|
|
device_initcall(thermal_throttle_init_device);
|
|
|
|
#endif /* CONFIG_SYSFS */
|
|
|
|
static void notify_package_thresholds(__u64 msr_val)
|
|
{
|
|
bool notify_thres_0 = false;
|
|
bool notify_thres_1 = false;
|
|
|
|
if (!platform_thermal_package_notify)
|
|
return;
|
|
|
|
/* lower threshold check */
|
|
if (msr_val & THERM_LOG_THRESHOLD0)
|
|
notify_thres_0 = true;
|
|
/* higher threshold check */
|
|
if (msr_val & THERM_LOG_THRESHOLD1)
|
|
notify_thres_1 = true;
|
|
|
|
if (!notify_thres_0 && !notify_thres_1)
|
|
return;
|
|
|
|
if (platform_thermal_package_rate_control &&
|
|
platform_thermal_package_rate_control()) {
|
|
/* Rate control is implemented in callback */
|
|
platform_thermal_package_notify(msr_val);
|
|
return;
|
|
}
|
|
|
|
/* lower threshold reached */
|
|
if (notify_thres_0 && thresh_event_valid(PACKAGE_LEVEL, 0))
|
|
platform_thermal_package_notify(msr_val);
|
|
/* higher threshold reached */
|
|
if (notify_thres_1 && thresh_event_valid(PACKAGE_LEVEL, 1))
|
|
platform_thermal_package_notify(msr_val);
|
|
}
|
|
|
|
static void notify_thresholds(__u64 msr_val)
|
|
{
|
|
/* check whether the interrupt handler is defined;
|
|
* otherwise simply return
|
|
*/
|
|
if (!platform_thermal_notify)
|
|
return;
|
|
|
|
/* lower threshold reached */
|
|
if ((msr_val & THERM_LOG_THRESHOLD0) &&
|
|
thresh_event_valid(CORE_LEVEL, 0))
|
|
platform_thermal_notify(msr_val);
|
|
/* higher threshold reached */
|
|
if ((msr_val & THERM_LOG_THRESHOLD1) &&
|
|
thresh_event_valid(CORE_LEVEL, 1))
|
|
platform_thermal_notify(msr_val);
|
|
}
|
|
|
|
void __weak notify_hwp_interrupt(void)
|
|
{
|
|
wrmsrl_safe(MSR_HWP_STATUS, 0);
|
|
}
|
|
|
|
/* Thermal transition interrupt handler */
|
|
void intel_thermal_interrupt(void)
|
|
{
|
|
__u64 msr_val;
|
|
|
|
if (static_cpu_has(X86_FEATURE_HWP))
|
|
notify_hwp_interrupt();
|
|
|
|
rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
|
|
|
|
/* Check for violation of core thermal thresholds*/
|
|
notify_thresholds(msr_val);
|
|
|
|
therm_throt_process(msr_val & THERM_STATUS_PROCHOT,
|
|
THERMAL_THROTTLING_EVENT,
|
|
CORE_LEVEL);
|
|
|
|
if (this_cpu_has(X86_FEATURE_PLN) && int_pln_enable)
|
|
therm_throt_process(msr_val & THERM_STATUS_POWER_LIMIT,
|
|
POWER_LIMIT_EVENT,
|
|
CORE_LEVEL);
|
|
|
|
if (this_cpu_has(X86_FEATURE_PTS)) {
|
|
rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val);
|
|
/* check violations of package thermal thresholds */
|
|
notify_package_thresholds(msr_val);
|
|
therm_throt_process(msr_val & PACKAGE_THERM_STATUS_PROCHOT,
|
|
THERMAL_THROTTLING_EVENT,
|
|
PACKAGE_LEVEL);
|
|
if (this_cpu_has(X86_FEATURE_PLN) && int_pln_enable)
|
|
therm_throt_process(msr_val &
|
|
PACKAGE_THERM_STATUS_POWER_LIMIT,
|
|
POWER_LIMIT_EVENT,
|
|
PACKAGE_LEVEL);
|
|
}
|
|
}
|
|
|
|
/* Thermal monitoring depends on APIC, ACPI and clock modulation */
|
|
static int intel_thermal_supported(struct cpuinfo_x86 *c)
|
|
{
|
|
if (!boot_cpu_has(X86_FEATURE_APIC))
|
|
return 0;
|
|
if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))
|
|
return 0;
|
|
return 1;
|
|
}
|
|
|
|
bool x86_thermal_enabled(void)
|
|
{
|
|
return atomic_read(&therm_throt_en);
|
|
}
|
|
|
|
void __init therm_lvt_init(void)
|
|
{
|
|
/*
|
|
* This function is only called on boot CPU. Save the init thermal
|
|
* LVT value on BSP and use that value to restore APs' thermal LVT
|
|
* entry BIOS programmed later
|
|
*/
|
|
if (intel_thermal_supported(&boot_cpu_data))
|
|
lvtthmr_init = apic_read(APIC_LVTTHMR);
|
|
}
|
|
|
|
void intel_init_thermal(struct cpuinfo_x86 *c)
|
|
{
|
|
unsigned int cpu = smp_processor_id();
|
|
int tm2 = 0;
|
|
u32 l, h;
|
|
|
|
if (!intel_thermal_supported(c))
|
|
return;
|
|
|
|
/*
|
|
* First check if its enabled already, in which case there might
|
|
* be some SMM goo which handles it, so we can't even put a handler
|
|
* since it might be delivered via SMI already:
|
|
*/
|
|
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
|
|
|
|
h = lvtthmr_init;
|
|
/*
|
|
* The initial value of thermal LVT entries on all APs always reads
|
|
* 0x10000 because APs are woken up by BSP issuing INIT-SIPI-SIPI
|
|
* sequence to them and LVT registers are reset to 0s except for
|
|
* the mask bits which are set to 1s when APs receive INIT IPI.
|
|
* If BIOS takes over the thermal interrupt and sets its interrupt
|
|
* delivery mode to SMI (not fixed), it restores the value that the
|
|
* BIOS has programmed on AP based on BSP's info we saved since BIOS
|
|
* is always setting the same value for all threads/cores.
|
|
*/
|
|
if ((h & APIC_DM_FIXED_MASK) != APIC_DM_FIXED)
|
|
apic_write(APIC_LVTTHMR, lvtthmr_init);
|
|
|
|
|
|
if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {
|
|
if (system_state == SYSTEM_BOOTING)
|
|
pr_debug("CPU%d: Thermal monitoring handled by SMI\n", cpu);
|
|
return;
|
|
}
|
|
|
|
/* early Pentium M models use different method for enabling TM2 */
|
|
if (cpu_has(c, X86_FEATURE_TM2)) {
|
|
if (c->x86 == 6 && (c->x86_model == 9 || c->x86_model == 13)) {
|
|
rdmsr(MSR_THERM2_CTL, l, h);
|
|
if (l & MSR_THERM2_CTL_TM_SELECT)
|
|
tm2 = 1;
|
|
} else if (l & MSR_IA32_MISC_ENABLE_TM2)
|
|
tm2 = 1;
|
|
}
|
|
|
|
/* We'll mask the thermal vector in the lapic till we're ready: */
|
|
h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;
|
|
apic_write(APIC_LVTTHMR, h);
|
|
|
|
rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
|
|
if (cpu_has(c, X86_FEATURE_PLN) && !int_pln_enable)
|
|
wrmsr(MSR_IA32_THERM_INTERRUPT,
|
|
(l | (THERM_INT_LOW_ENABLE
|
|
| THERM_INT_HIGH_ENABLE)) & ~THERM_INT_PLN_ENABLE, h);
|
|
else if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
|
|
wrmsr(MSR_IA32_THERM_INTERRUPT,
|
|
l | (THERM_INT_LOW_ENABLE
|
|
| THERM_INT_HIGH_ENABLE | THERM_INT_PLN_ENABLE), h);
|
|
else
|
|
wrmsr(MSR_IA32_THERM_INTERRUPT,
|
|
l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);
|
|
|
|
if (cpu_has(c, X86_FEATURE_PTS)) {
|
|
rdmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
|
|
if (cpu_has(c, X86_FEATURE_PLN) && !int_pln_enable)
|
|
wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
|
|
(l | (PACKAGE_THERM_INT_LOW_ENABLE
|
|
| PACKAGE_THERM_INT_HIGH_ENABLE))
|
|
& ~PACKAGE_THERM_INT_PLN_ENABLE, h);
|
|
else if (cpu_has(c, X86_FEATURE_PLN) && int_pln_enable)
|
|
wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
|
|
l | (PACKAGE_THERM_INT_LOW_ENABLE
|
|
| PACKAGE_THERM_INT_HIGH_ENABLE
|
|
| PACKAGE_THERM_INT_PLN_ENABLE), h);
|
|
else
|
|
wrmsr(MSR_IA32_PACKAGE_THERM_INTERRUPT,
|
|
l | (PACKAGE_THERM_INT_LOW_ENABLE
|
|
| PACKAGE_THERM_INT_HIGH_ENABLE), h);
|
|
}
|
|
|
|
rdmsr(MSR_IA32_MISC_ENABLE, l, h);
|
|
wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);
|
|
|
|
pr_info_once("CPU0: Thermal monitoring enabled (%s)\n",
|
|
tm2 ? "TM2" : "TM1");
|
|
|
|
/* enable thermal throttle processing */
|
|
atomic_set(&therm_throt_en, 1);
|
|
}
|