220 lines
5.1 KiB
C
220 lines
5.1 KiB
C
/*
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* omap_voutdef.h
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*
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* Copyright (C) 2010 Texas Instruments.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#ifndef OMAP_VOUTDEF_H
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#define OMAP_VOUTDEF_H
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#include <media/videobuf2-dma-contig.h>
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#include <media/v4l2-ctrls.h>
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#include <video/omapfb_dss.h>
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#include <video/omapvrfb.h>
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#include <linux/dmaengine.h>
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#define YUYV_BPP 2
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#define RGB565_BPP 2
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#define RGB24_BPP 3
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#define RGB32_BPP 4
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#define TILE_SIZE 32
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#define YUYV_VRFB_BPP 2
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#define RGB_VRFB_BPP 1
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#define MAX_CID 3
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#define MAC_VRFB_CTXS 4
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#define MAX_VOUT_DEV 2
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#define MAX_OVLS 3
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#define MAX_DISPLAYS 10
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#define MAX_MANAGERS 3
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#define QQVGA_WIDTH 160
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#define QQVGA_HEIGHT 120
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/* Max Resolution supported by the driver */
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#define VID_MAX_WIDTH 1280 /* Largest width */
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#define VID_MAX_HEIGHT 720 /* Largest height */
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/* Minimum requirement is 2x2 for DSS */
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#define VID_MIN_WIDTH 2
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#define VID_MIN_HEIGHT 2
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/* 2048 x 2048 is max res supported by OMAP display controller */
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#define MAX_PIXELS_PER_LINE 2048
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#define VRFB_TX_TIMEOUT 1000
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#define VRFB_NUM_BUFS 4
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/* Max buffer size tobe allocated during init */
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#define OMAP_VOUT_MAX_BUF_SIZE (VID_MAX_WIDTH*VID_MAX_HEIGHT*4)
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enum dma_channel_state {
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DMA_CHAN_NOT_ALLOTED,
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DMA_CHAN_ALLOTED,
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};
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/* Enum for Rotation
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* DSS understands rotation in 0, 1, 2, 3 context
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* while V4L2 driver understands it as 0, 90, 180, 270
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*/
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enum dss_rotation {
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dss_rotation_0_degree = 0,
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dss_rotation_90_degree = 1,
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dss_rotation_180_degree = 2,
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dss_rotation_270_degree = 3,
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};
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/* Enum for choosing rotation type for vout
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* DSS2 doesn't understand no rotation as an
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* option while V4L2 driver doesn't support
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* rotation in the case where VRFB is not built in
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* the kernel
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*/
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enum vout_rotaion_type {
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VOUT_ROT_NONE = 0,
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VOUT_ROT_VRFB = 1,
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};
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/*
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* This structure is used to store the DMA transfer parameters
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* for VRFB hidden buffer
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*/
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struct vid_vrfb_dma {
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struct dma_chan *chan;
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struct dma_interleaved_template *xt;
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int req_status;
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int tx_status;
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wait_queue_head_t wait;
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};
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struct omapvideo_info {
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int id;
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int num_overlays;
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struct omap_overlay *overlays[MAX_OVLS];
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enum vout_rotaion_type rotation_type;
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};
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struct omap2video_device {
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struct mutex mtx;
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int state;
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struct v4l2_device v4l2_dev;
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struct omap_vout_device *vouts[MAX_VOUT_DEV];
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int num_displays;
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struct omap_dss_device *displays[MAX_DISPLAYS];
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int num_overlays;
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struct omap_overlay *overlays[MAX_OVLS];
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int num_managers;
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struct omap_overlay_manager *managers[MAX_MANAGERS];
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};
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/* buffer for one video frame */
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struct omap_vout_buffer {
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/* common v4l buffer stuff -- must be first */
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struct vb2_v4l2_buffer vbuf;
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struct list_head queue;
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};
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static inline struct omap_vout_buffer *vb2_to_omap_vout_buffer(struct vb2_buffer *vb)
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{
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struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
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return container_of(vbuf, struct omap_vout_buffer, vbuf);
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}
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/* per-device data structure */
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struct omap_vout_device {
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struct omapvideo_info vid_info;
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struct video_device *vfd;
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struct omap2video_device *vid_dev;
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struct v4l2_ctrl_handler ctrl_handler;
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int vid;
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/* allow to reuse previously allocated buffer which is big enough */
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int buffer_size;
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enum omap_color_mode dss_mode;
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u32 sequence;
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struct v4l2_pix_format pix;
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struct v4l2_rect crop;
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struct v4l2_window win;
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struct v4l2_framebuffer fbuf;
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/* Lock to protect the shared data structures in ioctl */
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struct mutex lock;
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enum dss_rotation rotation;
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bool mirror;
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int flicker_filter;
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int bpp; /* bytes per pixel */
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int vrfb_bpp; /* bytes per pixel with respect to VRFB */
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struct vid_vrfb_dma vrfb_dma_tx;
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unsigned int smsshado_phy_addr[MAC_VRFB_CTXS];
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unsigned int smsshado_virt_addr[MAC_VRFB_CTXS];
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struct vrfb vrfb_context[MAC_VRFB_CTXS];
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bool vrfb_static_allocation;
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unsigned int smsshado_size;
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unsigned char pos;
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int ps, vr_ps, line_length, first_int, field_id;
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struct omap_vout_buffer *cur_frm, *next_frm;
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spinlock_t vbq_lock; /* spinlock for dma_queue */
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struct list_head dma_queue;
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u8 *queued_buf_addr[VIDEO_MAX_FRAME];
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u32 cropped_offset;
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s32 tv_field1_offset;
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void *isr_handle;
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struct vb2_queue vq;
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};
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/*
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* Return true if rotation is 90 or 270
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*/
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static inline int is_rotation_90_or_270(const struct omap_vout_device *vout)
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{
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return (vout->rotation == dss_rotation_90_degree ||
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vout->rotation == dss_rotation_270_degree);
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}
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/*
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* Return true if rotation is enabled
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*/
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static inline int is_rotation_enabled(const struct omap_vout_device *vout)
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{
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return vout->rotation || vout->mirror;
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}
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/*
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* Reverse the rotation degree if mirroring is enabled
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*/
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static inline int calc_rotation(const struct omap_vout_device *vout)
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{
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if (!vout->mirror)
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return vout->rotation;
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switch (vout->rotation) {
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case dss_rotation_90_degree:
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return dss_rotation_270_degree;
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case dss_rotation_270_degree:
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return dss_rotation_90_degree;
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case dss_rotation_180_degree:
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return dss_rotation_0_degree;
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default:
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return dss_rotation_180_degree;
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}
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}
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void omap_vout_free_buffers(struct omap_vout_device *vout);
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#endif /* ifndef OMAP_VOUTDEF_H */
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