699 lines
13 KiB
Plaintext
699 lines
13 KiB
Plaintext
/*
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* fuc microcode for g98 sec engine
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* Copyright (C) 2010 Marcin Kościelnicki
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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.section #g98_sec_data
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ctx_dma:
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ctx_dma_query: .b32 0
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ctx_dma_src: .b32 0
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ctx_dma_dst: .b32 0
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.equ #dma_count 3
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ctx_query_address_high: .b32 0
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ctx_query_address_low: .b32 0
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ctx_query_counter: .b32 0
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ctx_cond_address_high: .b32 0
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ctx_cond_address_low: .b32 0
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ctx_cond_off: .b32 0
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ctx_src_address_high: .b32 0
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ctx_src_address_low: .b32 0
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ctx_dst_address_high: .b32 0
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ctx_dst_address_low: .b32 0
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ctx_mode: .b32 0
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.align 16
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ctx_key: .skip 16
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ctx_iv: .skip 16
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.align 0x80
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swap:
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.skip 32
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.align 8
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common_cmd_dtable:
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.b32 #ctx_query_address_high + 0x20000 ~0xff
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.b32 #ctx_query_address_low + 0x20000 ~0xfffffff0
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.b32 #ctx_query_counter + 0x20000 ~0xffffffff
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.b32 #cmd_query_get + 0x00000 ~1
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.b32 #ctx_cond_address_high + 0x20000 ~0xff
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.b32 #ctx_cond_address_low + 0x20000 ~0xfffffff0
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.b32 #cmd_cond_mode + 0x00000 ~7
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.b32 #cmd_wrcache_flush + 0x00000 ~0
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.equ #common_cmd_max 0x88
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.align 8
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engine_cmd_dtable:
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.b32 #ctx_key + 0x0 + 0x20000 ~0xffffffff
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.b32 #ctx_key + 0x4 + 0x20000 ~0xffffffff
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.b32 #ctx_key + 0x8 + 0x20000 ~0xffffffff
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.b32 #ctx_key + 0xc + 0x20000 ~0xffffffff
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.b32 #ctx_iv + 0x0 + 0x20000 ~0xffffffff
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.b32 #ctx_iv + 0x4 + 0x20000 ~0xffffffff
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.b32 #ctx_iv + 0x8 + 0x20000 ~0xffffffff
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.b32 #ctx_iv + 0xc + 0x20000 ~0xffffffff
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.b32 #ctx_src_address_high + 0x20000 ~0xff
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.b32 #ctx_src_address_low + 0x20000 ~0xfffffff0
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.b32 #ctx_dst_address_high + 0x20000 ~0xff
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.b32 #ctx_dst_address_low + 0x20000 ~0xfffffff0
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.b32 #sec_cmd_mode + 0x00000 ~0xf
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.b32 #sec_cmd_length + 0x10000 ~0x0ffffff0
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.equ #engine_cmd_max 0xce
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.align 4
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sec_dtable:
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.b16 #sec_copy_prep #sec_do_inout
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.b16 #sec_store_prep #sec_do_out
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.b16 #sec_ecb_e_prep #sec_do_inout
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.b16 #sec_ecb_d_prep #sec_do_inout
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.b16 #sec_cbc_e_prep #sec_do_inout
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.b16 #sec_cbc_d_prep #sec_do_inout
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.b16 #sec_pcbc_e_prep #sec_do_inout
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.b16 #sec_pcbc_d_prep #sec_do_inout
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.b16 #sec_cfb_e_prep #sec_do_inout
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.b16 #sec_cfb_d_prep #sec_do_inout
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.b16 #sec_ofb_prep #sec_do_inout
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.b16 #sec_ctr_prep #sec_do_inout
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.b16 #sec_cbc_mac_prep #sec_do_in
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.b16 #sec_cmac_finish_complete_prep #sec_do_in
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.b16 #sec_cmac_finish_partial_prep #sec_do_in
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.align 0x100
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.section #g98_sec_code
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// $r0 is always set to 0 in our code - this allows some space savings.
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clear b32 $r0
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// set up the interrupt handler
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mov $r1 #ih
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mov $iv0 $r1
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// init stack pointer
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mov $sp $r0
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// set interrupt dispatch - route timer, fifo, ctxswitch to i0, others to host
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movw $r1 0xfff0
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sethi $r1 0
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mov $r2 0x400
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iowr I[$r2 + 0x300] $r1
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// enable the interrupts
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or $r1 0xc
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iowr I[$r2] $r1
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// enable fifo access and context switching
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mov $r1 3
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mov $r2 0x1200
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iowr I[$r2] $r1
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// enable i0 delivery
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bset $flags ie0
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// sleep forver, waking only for interrupts.
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bset $flags $p0
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spin:
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sleep $p0
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bra #spin
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// i0 handler
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ih:
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// see which interrupts we got
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iord $r1 I[$r0 + 0x200]
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and $r2 $r1 0x8
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cmpu b32 $r2 0
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bra e #noctx
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// context switch... prepare the regs for xfer
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mov $r2 0x7700
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mov $xtargets $r2
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mov $xdbase $r0
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// 128-byte context.
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mov $r2 0
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sethi $r2 0x50000
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// read current channel
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mov $r3 0x1400
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iord $r4 I[$r3]
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// if bit 30 set, it's active, so we have to unload it first.
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shl b32 $r5 $r4 1
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cmps b32 $r5 0
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bra nc #ctxload
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// unload the current channel - save the context
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xdst $r0 $r2
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xdwait
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// and clear bit 30, then write back
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bclr $r4 0x1e
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iowr I[$r3] $r4
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// tell PFIFO we unloaded
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mov $r4 1
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iowr I[$r3 + 0x200] $r4
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bra #noctx
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ctxload:
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// no channel loaded - perhaps we're requested to load one
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iord $r4 I[$r3 + 0x100]
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shl b32 $r15 $r4 1
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cmps b32 $r15 0
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// if bit 30 of next channel not set, probably PFIFO is just
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// killing a context. do a faux load, without the active bit.
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bra nc #dummyload
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// ok, do a real context load.
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xdld $r0 $r2
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xdwait
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mov $r5 #ctx_dma
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mov $r6 #dma_count - 1
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ctxload_dma_loop:
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ld b32 $r7 D[$r5 + $r6 * 4]
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add b32 $r8 $r6 0x180
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shl b32 $r8 8
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iowr I[$r8] $r7
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sub b32 $r6 1
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bra nc #ctxload_dma_loop
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dummyload:
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// tell PFIFO we're done
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mov $r5 2
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iowr I[$r3 + 0x200] $r5
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noctx:
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and $r2 $r1 0x4
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cmpu b32 $r2 0
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bra e #nocmd
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// incoming fifo command.
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mov $r3 0x1900
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iord $r2 I[$r3 + 0x100]
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iord $r3 I[$r3]
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// extract the method
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and $r4 $r2 0x7ff
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// shift the addr to proper position if we need to interrupt later
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shl b32 $r2 0x10
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// mthd 0 and 0x100 [NAME, NOP]: ignore
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and $r5 $r4 0x7bf
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cmpu b32 $r5 0
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bra e #cmddone
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mov $r5 #engine_cmd_dtable - 0xc0 * 8
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mov $r6 #engine_cmd_max
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cmpu b32 $r4 0xc0
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bra nc #dtable_cmd
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mov $r5 #common_cmd_dtable - 0x80 * 8
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mov $r6 #common_cmd_max
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cmpu b32 $r4 0x80
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bra nc #dtable_cmd
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cmpu b32 $r4 0x60
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bra nc #dma_cmd
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cmpu b32 $r4 0x50
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bra ne #illegal_mthd
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// mthd 0x140: PM_TRIGGER
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mov $r2 0x2200
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clear b32 $r3
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sethi $r3 0x20000
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iowr I[$r2] $r3
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bra #cmddone
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dma_cmd:
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// mthd 0x180...: DMA_*
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cmpu b32 $r4 0x60+#dma_count
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bra nc #illegal_mthd
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shl b32 $r5 $r4 2
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add b32 $r5 ((#ctx_dma - 0x60 * 4) & 0xffff)
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bset $r3 0x1e
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st b32 D[$r5] $r3
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add b32 $r4 0x180 - 0x60
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shl b32 $r4 8
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iowr I[$r4] $r3
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bra #cmddone
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dtable_cmd:
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cmpu b32 $r4 $r6
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bra nc #illegal_mthd
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shl b32 $r4 3
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add b32 $r4 $r5
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ld b32 $r5 D[$r4 + 4]
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and $r5 $r3
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cmpu b32 $r5 0
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bra ne #invalid_bitfield
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ld b16 $r5 D[$r4]
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ld b16 $r6 D[$r4 + 2]
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cmpu b32 $r6 2
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bra e #cmd_setctx
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ld b32 $r7 D[$r0 + #ctx_cond_off]
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and $r6 $r7
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cmpu b32 $r6 1
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bra e #cmddone
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call $r5
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bra $p1 #dispatch_error
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bra #cmddone
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cmd_setctx:
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st b32 D[$r5] $r3
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bra #cmddone
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invalid_bitfield:
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or $r2 1
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dispatch_error:
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illegal_mthd:
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mov $r4 0x1000
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iowr I[$r4] $r2
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iowr I[$r4 + 0x100] $r3
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mov $r4 0x40
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iowr I[$r0] $r4
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im_loop:
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iord $r4 I[$r0 + 0x200]
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and $r4 0x40
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cmpu b32 $r4 0
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bra ne #im_loop
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cmddone:
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// remove the command from FIFO
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mov $r3 0x1d00
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mov $r4 1
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iowr I[$r3] $r4
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nocmd:
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// ack the processed interrupts
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and $r1 $r1 0xc
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iowr I[$r0 + 0x100] $r1
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iret
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cmd_query_get:
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// if bit 0 of param set, trigger interrupt afterwards.
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setp $p1 $r3
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or $r2 3
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// read PTIMER, beware of races...
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mov $r4 0xb00
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ptimer_retry:
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iord $r6 I[$r4 + 0x100]
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iord $r5 I[$r4]
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iord $r7 I[$r4 + 0x100]
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cmpu b32 $r6 $r7
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bra ne #ptimer_retry
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// prepare the query structure
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ld b32 $r4 D[$r0 + #ctx_query_counter]
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st b32 D[$r0 + #swap + 0x0] $r4
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st b32 D[$r0 + #swap + 0x4] $r0
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st b32 D[$r0 + #swap + 0x8] $r5
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st b32 D[$r0 + #swap + 0xc] $r6
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// will use target 0, DMA_QUERY.
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mov $xtargets $r0
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ld b32 $r4 D[$r0 + #ctx_query_address_high]
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shl b32 $r4 0x18
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mov $xdbase $r4
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ld b32 $r4 D[$r0 + #ctx_query_address_low]
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mov $r5 #swap
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sethi $r5 0x20000
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xdst $r4 $r5
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xdwait
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ret
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cmd_cond_mode:
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// if >= 5, INVALID_ENUM
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bset $flags $p1
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or $r2 2
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cmpu b32 $r3 5
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bra nc #return
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// otherwise, no error.
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bclr $flags $p1
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// if < 2, no QUERY object is involved
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cmpu b32 $r3 2
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bra nc #cmd_cond_mode_queryful
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xor $r3 1
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st b32 D[$r0 + #ctx_cond_off] $r3
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return:
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ret
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cmd_cond_mode_queryful:
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// ok, will need to pull a QUERY object, prepare offsets
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ld b32 $r4 D[$r0 + #ctx_cond_address_high]
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ld b32 $r5 D[$r0 + #ctx_cond_address_low]
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and $r6 $r5 0xff
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shr b32 $r5 8
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shl b32 $r4 0x18
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or $r4 $r5
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mov $xdbase $r4
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mov $xtargets $r0
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// pull the first one
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mov $r5 #swap
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sethi $r5 0x20000
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xdld $r6 $r5
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// if == 2, only a single QUERY is involved...
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cmpu b32 $r3 2
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bra ne #cmd_cond_mode_double
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xdwait
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ld b32 $r4 D[$r0 + #swap + 4]
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cmpu b32 $r4 0
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xbit $r4 $flags z
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st b32 D[$r0 + #ctx_cond_off] $r4
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ret
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// ok, we'll need to pull second one too
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cmd_cond_mode_double:
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add b32 $r6 0x10
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add b32 $r5 0x10
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xdld $r6 $r5
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xdwait
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// compare COUNTERs
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ld b32 $r5 D[$r0 + #swap + 0x00]
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ld b32 $r6 D[$r0 + #swap + 0x10]
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cmpu b32 $r5 $r6
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xbit $r4 $flags z
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// compare RESen
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ld b32 $r5 D[$r0 + #swap + 0x04]
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ld b32 $r6 D[$r0 + #swap + 0x14]
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cmpu b32 $r5 $r6
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xbit $r5 $flags z
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and $r4 $r5
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// and negate or not, depending on mode
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cmpu b32 $r3 3
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xbit $r5 $flags z
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xor $r4 $r5
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st b32 D[$r0 + #ctx_cond_off] $r4
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ret
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cmd_wrcache_flush:
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bclr $flags $p1
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mov $r2 0x2200
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clear b32 $r3
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sethi $r3 0x10000
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iowr I[$r2] $r3
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ret
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sec_cmd_mode:
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// if >= 0xf, INVALID_ENUM
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bset $flags $p1
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or $r2 2
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cmpu b32 $r3 0xf
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bra nc #sec_cmd_mode_return
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bclr $flags $p1
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st b32 D[$r0 + #ctx_mode] $r3
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sec_cmd_mode_return:
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ret
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sec_cmd_length:
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// nop if length == 0
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cmpu b32 $r3 0
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bra e #sec_cmd_mode_return
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// init key, IV
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cxset 3
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mov $r4 #ctx_key
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sethi $r4 0x70000
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xdst $r0 $r4
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mov $r4 #ctx_iv
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sethi $r4 0x60000
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xdst $r0 $r4
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xdwait
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ckeyreg $c7
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// prepare the targets
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mov $r4 0x2100
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mov $xtargets $r4
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// prepare src address
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ld b32 $r4 D[$r0 + #ctx_src_address_high]
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ld b32 $r5 D[$r0 + #ctx_src_address_low]
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shr b32 $r8 $r5 8
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shl b32 $r4 0x18
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or $r4 $r8
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and $r5 $r5 0xff
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// prepare dst address
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ld b32 $r6 D[$r0 + #ctx_dst_address_high]
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ld b32 $r7 D[$r0 + #ctx_dst_address_low]
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shr b32 $r8 $r7 8
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shl b32 $r6 0x18
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or $r6 $r8
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and $r7 $r7 0xff
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// find the proper prep & do functions
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ld b32 $r8 D[$r0 + #ctx_mode]
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shl b32 $r8 2
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// run prep
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ld b16 $r9 D[$r8 + #sec_dtable]
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call $r9
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// do it
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ld b16 $r9 D[$r8 + #sec_dtable + 2]
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call $r9
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cxset 1
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xdwait
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cxset 0x61
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xdwait
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xdwait
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// update src address
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shr b32 $r8 $r4 0x18
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shl b32 $r9 $r4 8
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add b32 $r9 $r5
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adc b32 $r8 0
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st b32 D[$r0 + #ctx_src_address_high] $r8
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st b32 D[$r0 + #ctx_src_address_low] $r9
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// update dst address
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shr b32 $r8 $r6 0x18
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shl b32 $r9 $r6 8
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add b32 $r9 $r7
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adc b32 $r8 0
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st b32 D[$r0 + #ctx_dst_address_high] $r8
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st b32 D[$r0 + #ctx_dst_address_low] $r9
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// pull updated IV
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cxset 2
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mov $r4 #ctx_iv
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sethi $r4 0x60000
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xdld $r0 $r4
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xdwait
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ret
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sec_copy_prep:
|
|
cs0begin 2
|
|
cxsin $c0
|
|
cxsout $c0
|
|
ret
|
|
|
|
sec_store_prep:
|
|
cs0begin 1
|
|
cxsout $c6
|
|
ret
|
|
|
|
sec_ecb_e_prep:
|
|
cs0begin 3
|
|
cxsin $c0
|
|
cenc $c0 $c0
|
|
cxsout $c0
|
|
ret
|
|
|
|
sec_ecb_d_prep:
|
|
ckexp $c7 $c7
|
|
cs0begin 3
|
|
cxsin $c0
|
|
cdec $c0 $c0
|
|
cxsout $c0
|
|
ret
|
|
|
|
sec_cbc_e_prep:
|
|
cs0begin 4
|
|
cxsin $c0
|
|
cxor $c6 $c0
|
|
cenc $c6 $c6
|
|
cxsout $c6
|
|
ret
|
|
|
|
sec_cbc_d_prep:
|
|
ckexp $c7 $c7
|
|
cs0begin 5
|
|
cmov $c2 $c6
|
|
cxsin $c6
|
|
cdec $c0 $c6
|
|
cxor $c0 $c2
|
|
cxsout $c0
|
|
ret
|
|
|
|
sec_pcbc_e_prep:
|
|
cs0begin 5
|
|
cxsin $c0
|
|
cxor $c6 $c0
|
|
cenc $c6 $c6
|
|
cxsout $c6
|
|
cxor $c6 $c0
|
|
ret
|
|
|
|
sec_pcbc_d_prep:
|
|
ckexp $c7 $c7
|
|
cs0begin 5
|
|
cxsin $c0
|
|
cdec $c1 $c0
|
|
cxor $c6 $c1
|
|
cxsout $c6
|
|
cxor $c6 $c0
|
|
ret
|
|
|
|
sec_cfb_e_prep:
|
|
cs0begin 4
|
|
cenc $c6 $c6
|
|
cxsin $c0
|
|
cxor $c6 $c0
|
|
cxsout $c6
|
|
ret
|
|
|
|
sec_cfb_d_prep:
|
|
cs0begin 4
|
|
cenc $c0 $c6
|
|
cxsin $c6
|
|
cxor $c0 $c6
|
|
cxsout $c0
|
|
ret
|
|
|
|
sec_ofb_prep:
|
|
cs0begin 4
|
|
cenc $c6 $c6
|
|
cxsin $c0
|
|
cxor $c0 $c6
|
|
cxsout $c0
|
|
ret
|
|
|
|
sec_ctr_prep:
|
|
cs0begin 5
|
|
cenc $c1 $c6
|
|
cadd $c6 1
|
|
cxsin $c0
|
|
cxor $c0 $c1
|
|
cxsout $c0
|
|
ret
|
|
|
|
sec_cbc_mac_prep:
|
|
cs0begin 3
|
|
cxsin $c0
|
|
cxor $c6 $c0
|
|
cenc $c6 $c6
|
|
ret
|
|
|
|
sec_cmac_finish_complete_prep:
|
|
cs0begin 7
|
|
cxsin $c0
|
|
cxor $c6 $c0
|
|
cxor $c0 $c0
|
|
cenc $c0 $c0
|
|
cprecmac $c0 $c0
|
|
cxor $c6 $c0
|
|
cenc $c6 $c6
|
|
ret
|
|
|
|
sec_cmac_finish_partial_prep:
|
|
cs0begin 8
|
|
cxsin $c0
|
|
cxor $c6 $c0
|
|
cxor $c0 $c0
|
|
cenc $c0 $c0
|
|
cprecmac $c0 $c0
|
|
cprecmac $c0 $c0
|
|
cxor $c6 $c0
|
|
cenc $c6 $c6
|
|
ret
|
|
|
|
// TODO
|
|
sec_do_in:
|
|
add b32 $r3 $r5
|
|
mov $xdbase $r4
|
|
mov $r9 #swap
|
|
sethi $r9 0x20000
|
|
sec_do_in_loop:
|
|
xdld $r5 $r9
|
|
xdwait
|
|
cxset 0x22
|
|
xdst $r0 $r9
|
|
cs0exec 1
|
|
xdwait
|
|
add b32 $r5 0x10
|
|
cmpu b32 $r5 $r3
|
|
bra ne #sec_do_in_loop
|
|
cxset 1
|
|
xdwait
|
|
ret
|
|
|
|
sec_do_out:
|
|
add b32 $r3 $r7
|
|
mov $xdbase $r6
|
|
mov $r9 #swap
|
|
sethi $r9 0x20000
|
|
sec_do_out_loop:
|
|
cs0exec 1
|
|
cxset 0x61
|
|
xdld $r7 $r9
|
|
xdst $r7 $r9
|
|
cxset 1
|
|
xdwait
|
|
add b32 $r7 0x10
|
|
cmpu b32 $r7 $r3
|
|
bra ne #sec_do_out_loop
|
|
ret
|
|
|
|
sec_do_inout:
|
|
add b32 $r3 $r5
|
|
mov $r9 #swap
|
|
sethi $r9 0x20000
|
|
sec_do_inout_loop:
|
|
mov $xdbase $r4
|
|
xdld $r5 $r9
|
|
xdwait
|
|
cxset 0x21
|
|
xdst $r0 $r9
|
|
cs0exec 1
|
|
cxset 0x61
|
|
mov $xdbase $r6
|
|
xdld $r7 $r9
|
|
xdst $r7 $r9
|
|
cxset 1
|
|
xdwait
|
|
add b32 $r5 0x10
|
|
add b32 $r7 0x10
|
|
cmpu b32 $r5 $r3
|
|
bra ne #sec_do_inout_loop
|
|
ret
|
|
|
|
.align 0x100
|