262 lines
14 KiB
Plaintext
262 lines
14 KiB
Plaintext
/*
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* Copyright 2013 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs <bskeggs@redhat.com>
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*/
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#include "os.h"
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#define GF100 0xc0
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#define GF117 0xd7
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#define GK100 0xe0
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#define GK110 0xf0
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#define GK208 0x108
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#define GM107 0x117
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#define NV_PGRAPH_TRAPPED_ADDR 0x400704
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#define NV_PGRAPH_TRAPPED_DATA_LO 0x400708
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#define NV_PGRAPH_TRAPPED_DATA_HI 0x40070c
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#define NV_PGRAPH_FE_OBJECT_TABLE(n) ((n) * 4 + 0x400700)
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#define NV_PGRAPH_FECS_INTR_ACK 0x409004
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#define NV_PGRAPH_FECS_INTR 0x409008
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#define NV_PGRAPH_FECS_INTR_FWMTHD 0x00000400
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#define NV_PGRAPH_FECS_INTR_CHSW 0x00000100
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#define NV_PGRAPH_FECS_INTR_FIFO 0x00000004
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#define NV_PGRAPH_FECS_INTR_MODE 0x40900c
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#define NV_PGRAPH_FECS_INTR_MODE_FIFO 0x00000004
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#define NV_PGRAPH_FECS_INTR_MODE_FIFO_LEVEL 0x00000004
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#define NV_PGRAPH_FECS_INTR_MODE_FIFO_EDGE 0x00000000
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#define NV_PGRAPH_FECS_INTR_EN_SET 0x409010
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#define NV_PGRAPH_FECS_INTR_EN_SET_FIFO 0x00000004
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#define NV_PGRAPH_FECS_INTR_ROUTE 0x40901c
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#define NV_PGRAPH_FECS_ACCESS 0x409048
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#define NV_PGRAPH_FECS_ACCESS_FIFO 0x00000002
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#define NV_PGRAPH_FECS_FIFO_DATA 0x409064
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#define NV_PGRAPH_FECS_FIFO_CMD 0x409068
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#define NV_PGRAPH_FECS_FIFO_ACK 0x409074
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#define NV_PGRAPH_FECS_CAPS 0x409108
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#define NV_PGRAPH_FECS_SIGNAL 0x409400
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#define NV_PGRAPH_FECS_IROUTE 0x409404
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#define NV_PGRAPH_FECS_BAR_MASK0 0x40940c
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#define NV_PGRAPH_FECS_BAR_MASK1 0x409410
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#define NV_PGRAPH_FECS_BAR 0x409414
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#define NV_PGRAPH_FECS_BAR_SET 0x409418
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#define NV_PGRAPH_FECS_RED_SWITCH 0x409614
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#define NV_PGRAPH_FECS_RED_SWITCH_ENABLE_ROP 0x00000400
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#define NV_PGRAPH_FECS_RED_SWITCH_ENABLE_GPC 0x00000200
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#define NV_PGRAPH_FECS_RED_SWITCH_ENABLE_MAIN 0x00000100
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#define NV_PGRAPH_FECS_RED_SWITCH_POWER_ROP 0x00000040
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#define NV_PGRAPH_FECS_RED_SWITCH_POWER_GPC 0x00000020
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#define NV_PGRAPH_FECS_RED_SWITCH_POWER_MAIN 0x00000010
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#define NV_PGRAPH_FECS_RED_SWITCH_PAUSE_GPC 0x00000002
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#define NV_PGRAPH_FECS_RED_SWITCH_PAUSE_MAIN 0x00000001
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#define NV_PGRAPH_FECS_MMCTX_SAVE_SWBASE 0x409700
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#define NV_PGRAPH_FECS_MMCTX_LOAD_SWBASE 0x409704
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#define NV_PGRAPH_FECS_MMCTX_LOAD_COUNT 0x40974c
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#define NV_PGRAPH_FECS_MMCTX_SAVE_SWBASE 0x409700
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#define NV_PGRAPH_FECS_MMCTX_LOAD_SWBASE 0x409704
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#define NV_PGRAPH_FECS_MMCTX_BASE 0x409710
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#define NV_PGRAPH_FECS_MMCTX_CTRL 0x409714
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#define NV_PGRAPH_FECS_MMCTX_MULTI_STRIDE 0x409718
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#define NV_PGRAPH_FECS_MMCTX_MULTI_MASK 0x40971c
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#define NV_PGRAPH_FECS_MMCTX_QUEUE 0x409720
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#define NV_PGRAPH_FECS_MMIO_BASE 0x409724
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#define NV_PGRAPH_FECS_MMIO_CTRL 0x409728
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#define NV_PGRAPH_FECS_MMIO_CTRL_BASE_ENABLE 0x00000001
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#define NV_PGRAPH_FECS_MMIO_RDVAL 0x40972c
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#define NV_PGRAPH_FECS_MMIO_WRVAL 0x409730
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#define NV_PGRAPH_FECS_MMCTX_LOAD_COUNT 0x40974c
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#if CHIPSET < GK110
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#define NV_PGRAPH_FECS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x409800)
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#define NV_PGRAPH_FECS_CC_SCRATCH_SET(n) ((n) * 4 + 0x409820)
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#define NV_PGRAPH_FECS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x409840)
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#define NV_PGRAPH_FECS_UNK86C 0x40986c
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#else
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#define NV_PGRAPH_FECS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x409800)
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#define NV_PGRAPH_FECS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x409840)
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#define NV_PGRAPH_FECS_UNK86C 0x40988c
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#define NV_PGRAPH_FECS_CC_SCRATCH_SET(n) ((n) * 4 + 0x4098c0)
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#endif
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#define NV_PGRAPH_FECS_STRANDS_CNT 0x409880
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#define NV_PGRAPH_FECS_STRAND_SAVE_SWBASE 0x409908
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#define NV_PGRAPH_FECS_STRAND_LOAD_SWBASE 0x40990c
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#define NV_PGRAPH_FECS_STRAND_WORDS 0x409910
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#define NV_PGRAPH_FECS_STRAND_DATA 0x409918
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#define NV_PGRAPH_FECS_STRAND_SELECT 0x40991c
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#define NV_PGRAPH_FECS_STRAND_CMD 0x409928
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#define NV_PGRAPH_FECS_STRAND_CMD_SEEK 0x00000001
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#define NV_PGRAPH_FECS_STRAND_CMD_GET_INFO 0x00000002
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#define NV_PGRAPH_FECS_STRAND_CMD_SAVE 0x00000003
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#define NV_PGRAPH_FECS_STRAND_CMD_LOAD 0x00000004
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#define NV_PGRAPH_FECS_STRAND_CMD_ACTIVATE_FILTER 0x0000000a
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#define NV_PGRAPH_FECS_STRAND_CMD_DEACTIVATE_FILTER 0x0000000b
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#define NV_PGRAPH_FECS_STRAND_CMD_ENABLE 0x0000000c
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#define NV_PGRAPH_FECS_STRAND_CMD_DISABLE 0x0000000d
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#define NV_PGRAPH_FECS_STRAND_FILTER 0x40993c
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#define NV_PGRAPH_FECS_MEM_BASE 0x409a04
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#define NV_PGRAPH_FECS_MEM_CHAN 0x409a0c
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#define NV_PGRAPH_FECS_MEM_CMD 0x409a10
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#define NV_PGRAPH_FECS_MEM_CMD_LOAD_CHAN 0x00000007
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#define NV_PGRAPH_FECS_MEM_TARGET 0x409a20
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#define NV_PGRAPH_FECS_MEM_TARGET_UNK31 0x80000000
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#define NV_PGRAPH_FECS_MEM_TARGET_AS 0x0000001f
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#define NV_PGRAPH_FECS_MEM_TARGET_AS_VM 0x00000001
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#define NV_PGRAPH_FECS_MEM_TARGET_AS_VRAM 0x00000002
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#define NV_PGRAPH_FECS_CHAN_ADDR 0x409b00
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#define NV_PGRAPH_FECS_CHAN_NEXT 0x409b04
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#define NV_PGRAPH_FECS_CHSW 0x409b0c
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#define NV_PGRAPH_FECS_CHSW_ACK 0x00000001
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#define NV_PGRAPH_FECS_INTR_UP_SET 0x409c1c
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#define NV_PGRAPH_FECS_INTR_UP_EN 0x409c24
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#define NV_PGRAPH_GPCX_GPCCS_INTR_ACK 0x41a004
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#define NV_PGRAPH_GPCX_GPCCS_INTR 0x41a008
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#define NV_PGRAPH_GPCX_GPCCS_INTR_FIFO 0x00000004
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#define NV_PGRAPH_GPCX_GPCCS_INTR_EN_SET 0x41a010
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#define NV_PGRAPH_GPCX_GPCCS_INTR_EN_SET_FIFO 0x00000004
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#define NV_PGRAPH_GPCX_GPCCS_INTR_ROUTE 0x41a01c
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#define NV_PGRAPH_GPCX_GPCCS_ACCESS 0x41a048
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#define NV_PGRAPH_GPCX_GPCCS_ACCESS_FIFO 0x00000002
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#define NV_PGRAPH_GPCX_GPCCS_FIFO_DATA 0x41a064
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#define NV_PGRAPH_GPCX_GPCCS_FIFO_CMD 0x41a068
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#define NV_PGRAPH_GPCX_GPCCS_FIFO_ACK 0x41a074
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#define NV_PGRAPH_GPCX_GPCCS_UNITS 0x41a608
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#define NV_PGRAPH_GPCX_GPCCS_CAPS 0x41a108
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#define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH 0x41a614
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#define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_UNK11 0x00000800
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#define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_ENABLE 0x00000200
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#define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_POWER 0x00000020
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#define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_PAUSE 0x00000002
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#define NV_PGRAPH_GPCX_GPCCS_MYINDEX 0x41a618
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#define NV_PGRAPH_GPCX_GPCCS_MMCTX_SAVE_SWBASE 0x41a700
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#define NV_PGRAPH_GPCX_GPCCS_MMCTX_LOAD_SWBASE 0x41a704
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#define NV_PGRAPH_GPCX_GPCCS_MMIO_BASE 0x41a724
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#define NV_PGRAPH_GPCX_GPCCS_MMIO_CTRL 0x41a728
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#define NV_PGRAPH_GPCX_GPCCS_MMIO_CTRL_BASE_ENABLE 0x00000001
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#define NV_PGRAPH_GPCX_GPCCS_MMIO_RDVAL 0x41a72c
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#define NV_PGRAPH_GPCX_GPCCS_MMIO_WRVAL 0x41a730
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#define NV_PGRAPH_GPCX_GPCCS_MMCTX_LOAD_COUNT 0x41a74c
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#if CHIPSET < GK110
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#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x41a800)
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#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_SET(n) ((n) * 4 + 0x41a820)
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#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x41a840)
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#define NV_PGRAPH_GPCX_GPCCS_UNK86C 0x41a86c
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#else
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#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x41a800)
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#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x41a840)
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#define NV_PGRAPH_GPCX_GPCCS_UNK86C 0x41a88c
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#define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_SET(n) ((n) * 4 + 0x41a8c0)
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#endif
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#define NV_PGRAPH_GPCX_GPCCS_STRAND_SELECT 0x41a91c
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#define NV_PGRAPH_GPCX_GPCCS_STRAND_CMD 0x41a928
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#define NV_PGRAPH_GPCX_GPCCS_STRAND_CMD_SAVE 0x00000003
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#define NV_PGRAPH_GPCX_GPCCS_STRAND_CMD_LOAD 0x00000004
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#define NV_PGRAPH_GPCX_GPCCS_MEM_BASE 0x41aa04
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#define NV_PGRAPH_GPCX_GPCCS_TPC_STATUS 0x41acfc
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#define NV_PGRAPH_GPC0_TPC0 0x504000
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#define NV_PGRAPH_GPC0_TPC0__SIZE 0x000800
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#define NV_PGRAPH_GPC0_TPCX_STRAND_INDEX 0x501d60
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#define NV_PGRAPH_GPC0_TPCX_STRAND_INDEX_ALL 0x0000003f
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#define NV_PGRAPH_GPC0_TPCX_STRAND_DATA 0x501d98
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#define NV_PGRAPH_GPC0_TPCX_STRAND_SELECT 0x501d9c
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#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD 0x501da8
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#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_SEEK 0x00000001
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#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_GET_INFO 0x00000002
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#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_SAVE 0x00000003
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#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_LOAD 0x00000004
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#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_ENABLE 0x0000000c
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#define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_DISABLE 0x0000000d
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#define NV_PGRAPH_GPC0_TPCX_STRAND_MEM_BASE 0x501dc4
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#define NV_TPC_STRAND_INDEX 0x560
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#define NV_TPC_STRAND_CNT 0x570
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#define NV_TPC_STRAND_SAVE_SWBASE 0x588
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#define NV_TPC_STRAND_LOAD_SWBASE 0x58c
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#define NV_TPC_STRAND_WORDS 0x590
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#define mmctx_data(r,c) .b32 (((c - 1) << 26) | r)
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#define queue_init .skip 72 // (2 * 4) + ((8 * 4) * 2)
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#define T_WAIT 0
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#define T_MMCTX 1
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#define T_STRWAIT 2
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#define T_STRINIT 3
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#define T_AUTO 4
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#define T_CHAN 5
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#define T_LOAD 6
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#define T_SAVE 7
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#define T_LCHAN 8
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#define T_LCTXH 9
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#define T_STRTPC 10
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#if CHIPSET < GK208
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#define imm32(reg,val) /*
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*/ movw reg ((val) & 0x0000ffff) /*
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*/ sethi reg ((val) & 0xffff0000)
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#else
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#define imm32(reg,val) /*
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*/ mov reg (val)
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#endif
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#define nv_mkio(rv,r,i) /*
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*/ imm32(rv, (((r) & 0xffc) << 6) | ((i) << 2))
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#define hash #
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#define fn(a) a
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#if CHIPSET < GK208
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#define call(a) call fn(hash)a
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#else
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#define call(a) lcall fn(hash)a
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#endif
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#define nv_iord(rv,r,i) /*
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*/ nv_mkio(rv,r,i) /*
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*/ iord rv I[rv]
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#define nv_iowr(r,i,rv) /*
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*/ nv_mkio($r0,r,i) /*
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*/ iowr I[$r0] rv /*
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*/ clear b32 $r0
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#define nv_rd32(reg,addr) /*
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*/ imm32($r14, addr) /*
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*/ call(nv_rd32) /*
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*/ mov b32 reg $r15
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#define nv_wr32(addr,reg) /*
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*/ mov b32 $r15 reg /*
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*/ imm32($r14, addr) /*
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*/ call(nv_wr32)
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#define trace_set(bit) /*
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*/ clear b32 $r9 /*
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*/ bset $r9 bit /*
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*/ nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_SET(7), 0, $r9)
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#define trace_clr(bit) /*
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*/ clear b32 $r9 /*
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*/ bset $r9 bit /*
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*/ nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_CLR(7), 0, $r9)
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