197 lines
6.1 KiB
C
197 lines
6.1 KiB
C
/*
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* Copyright 2012 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "ior.h"
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#include <subdev/timer.h>
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void
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gf119_sor_dp_watermark(struct nvkm_ior *sor, int head, u8 watermark)
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{
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struct nvkm_device *device = sor->disp->engine.subdev.device;
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const u32 hoff = head * 0x800;
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nvkm_mask(device, 0x616610 + hoff, 0x0800003f, 0x08000000 | watermark);
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}
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void
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gf119_sor_dp_audio_sym(struct nvkm_ior *sor, int head, u16 h, u32 v)
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{
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struct nvkm_device *device = sor->disp->engine.subdev.device;
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const u32 hoff = head * 0x800;
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nvkm_mask(device, 0x616620 + hoff, 0x0000ffff, h);
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nvkm_mask(device, 0x616624 + hoff, 0x00ffffff, v);
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}
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void
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gf119_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable)
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{
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struct nvkm_device *device = sor->disp->engine.subdev.device;
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const u32 hoff = 0x800 * head;
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const u32 data = 0x80000000 | (0x00000001 * enable);
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const u32 mask = 0x8000000d;
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nvkm_mask(device, 0x616618 + hoff, mask, data);
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nvkm_msec(device, 2000,
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if (!(nvkm_rd32(device, 0x616618 + hoff) & 0x80000000))
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break;
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);
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}
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void
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gf119_sor_dp_vcpi(struct nvkm_ior *sor, int head,
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u8 slot, u8 slot_nr, u16 pbn, u16 aligned)
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{
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struct nvkm_device *device = sor->disp->engine.subdev.device;
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const u32 hoff = head * 0x800;
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nvkm_mask(device, 0x616588 + hoff, 0x00003f3f, (slot_nr << 8) | slot);
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nvkm_mask(device, 0x61658c + hoff, 0xffffffff, (aligned << 16) | pbn);
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}
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void
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gf119_sor_dp_drive(struct nvkm_ior *sor, int ln, int pc, int dc, int pe, int pu)
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{
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struct nvkm_device *device = sor->disp->engine.subdev.device;
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const u32 loff = nv50_sor_link(sor);
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const u32 shift = sor->func->dp.lanes[ln] * 8;
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u32 data[4];
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data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift);
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data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift);
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data[2] = nvkm_rd32(device, 0x61c130 + loff);
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if ((data[2] & 0x0000ff00) < (pu << 8) || ln == 0)
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data[2] = (data[2] & ~0x0000ff00) | (pu << 8);
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nvkm_wr32(device, 0x61c118 + loff, data[0] | (dc << shift));
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nvkm_wr32(device, 0x61c120 + loff, data[1] | (pe << shift));
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nvkm_wr32(device, 0x61c130 + loff, data[2]);
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data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift);
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nvkm_wr32(device, 0x61c13c + loff, data[3] | (pc << shift));
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}
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void
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gf119_sor_dp_pattern(struct nvkm_ior *sor, int pattern)
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{
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struct nvkm_device *device = sor->disp->engine.subdev.device;
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const u32 soff = nv50_ior_base(sor);
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nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, 0x01010101 * pattern);
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}
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int
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gf119_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux)
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{
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struct nvkm_device *device = sor->disp->engine.subdev.device;
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const u32 soff = nv50_ior_base(sor);
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const u32 loff = nv50_sor_link(sor);
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u32 dpctrl = 0x00000000;
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u32 clksor = 0x00000000;
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clksor |= sor->dp.bw << 18;
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dpctrl |= ((1 << sor->dp.nr) - 1) << 16;
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if (sor->dp.mst)
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dpctrl |= 0x40000000;
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if (sor->dp.ef)
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dpctrl |= 0x00004000;
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nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor);
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nvkm_mask(device, 0x61c10c + loff, 0x401f4000, dpctrl);
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return 0;
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}
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void
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gf119_sor_clock(struct nvkm_ior *sor)
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{
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struct nvkm_device *device = sor->disp->engine.subdev.device;
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const u32 soff = nv50_ior_base(sor);
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u32 div1 = sor->asy.link == 3;
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u32 div2 = sor->asy.link == 3;
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if (sor->asy.proto == TMDS) {
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const u32 speed = sor->tmds.high_speed ? 0x14 : 0x0a;
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nvkm_mask(device, 0x612300 + soff, 0x007c0000, speed << 18);
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if (sor->tmds.high_speed)
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div2 = 1;
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}
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nvkm_mask(device, 0x612300 + soff, 0x00000707, (div2 << 8) | div1);
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}
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void
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gf119_sor_state(struct nvkm_ior *sor, struct nvkm_ior_state *state)
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{
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struct nvkm_device *device = sor->disp->engine.subdev.device;
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const u32 coff = (state == &sor->asy) * 0x20000 + sor->id * 0x20;
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u32 ctrl = nvkm_rd32(device, 0x640200 + coff);
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state->proto_evo = (ctrl & 0x00000f00) >> 8;
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switch (state->proto_evo) {
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case 0: state->proto = LVDS; state->link = 1; break;
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case 1: state->proto = TMDS; state->link = 1; break;
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case 2: state->proto = TMDS; state->link = 2; break;
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case 5: state->proto = TMDS; state->link = 3; break;
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case 8: state->proto = DP; state->link = 1; break;
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case 9: state->proto = DP; state->link = 2; break;
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default:
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state->proto = UNKNOWN;
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break;
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}
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state->head = ctrl & 0x0000000f;
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}
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static const struct nvkm_ior_func
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gf119_sor = {
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.state = gf119_sor_state,
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.power = nv50_sor_power,
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.clock = gf119_sor_clock,
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.hdmi = {
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.ctrl = gf119_hdmi_ctrl,
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},
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.dp = {
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.lanes = { 2, 1, 0, 3 },
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.links = gf119_sor_dp_links,
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.power = g94_sor_dp_power,
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.pattern = gf119_sor_dp_pattern,
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.drive = gf119_sor_dp_drive,
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.vcpi = gf119_sor_dp_vcpi,
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.audio = gf119_sor_dp_audio,
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.audio_sym = gf119_sor_dp_audio_sym,
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.watermark = gf119_sor_dp_watermark,
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},
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.hda = {
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.hpd = gf119_hda_hpd,
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.eld = gf119_hda_eld,
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.device_entry = gf119_hda_device_entry,
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},
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};
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int
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gf119_sor_new(struct nvkm_disp *disp, int id)
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{
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return nvkm_ior_new_(&gf119_sor, disp, SOR, id);
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}
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int
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gf119_sor_cnt(struct nvkm_disp *disp, unsigned long *pmask)
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{
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struct nvkm_device *device = disp->engine.subdev.device;
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*pmask = (nvkm_rd32(device, 0x612004) & 0x0000ff00) >> 8;
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return 8;
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}
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