80 lines
2.8 KiB
C
80 lines
2.8 KiB
C
/*
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* Copyright 2018 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "channv50.h"
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#include <core/ramht.h>
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#include <subdev/timer.h>
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static int
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gv100_disp_dmac_idle(struct nv50_disp_chan *chan)
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{
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struct nvkm_device *device = chan->disp->base.engine.subdev.device;
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const u32 soff = (chan->chid.ctrl - 1) * 0x04;
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nvkm_msec(device, 2000,
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u32 stat = nvkm_rd32(device, 0x610664 + soff);
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if ((stat & 0x000f0000) == 0x00040000)
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return 0;
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);
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return -EBUSY;
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}
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int
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gv100_disp_dmac_bind(struct nv50_disp_chan *chan,
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struct nvkm_object *object, u32 handle)
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{
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return nvkm_ramht_insert(chan->disp->ramht, object,
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chan->chid.user, -9, handle,
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chan->chid.user << 25 | 0x00000040);
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}
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void
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gv100_disp_dmac_fini(struct nv50_disp_chan *chan)
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{
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struct nvkm_device *device = chan->disp->base.engine.subdev.device;
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const u32 uoff = (chan->chid.ctrl - 1) * 0x1000;
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const u32 coff = chan->chid.ctrl * 0x04;
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nvkm_mask(device, 0x6104e0 + coff, 0x00000010, 0x00000000);
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gv100_disp_dmac_idle(chan);
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nvkm_mask(device, 0x6104e0 + coff, 0x00000002, 0x00000000);
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chan->suspend_put = nvkm_rd32(device, 0x690000 + uoff);
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}
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int
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gv100_disp_dmac_init(struct nv50_disp_chan *chan)
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{
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struct nvkm_subdev *subdev = &chan->disp->base.engine.subdev;
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struct nvkm_device *device = subdev->device;
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const u32 uoff = (chan->chid.ctrl - 1) * 0x1000;
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const u32 poff = chan->chid.ctrl * 0x10;
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const u32 coff = chan->chid.ctrl * 0x04;
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nvkm_wr32(device, 0x610b24 + poff, lower_32_bits(chan->push));
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nvkm_wr32(device, 0x610b20 + poff, upper_32_bits(chan->push));
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nvkm_wr32(device, 0x610b28 + poff, 0x00000001);
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nvkm_wr32(device, 0x610b2c + poff, 0x00000040);
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nvkm_mask(device, 0x6104e0 + coff, 0x00000010, 0x00000010);
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nvkm_wr32(device, 0x690000 + uoff, chan->suspend_put);
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nvkm_wr32(device, 0x6104e0 + coff, 0x00000013);
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return gv100_disp_dmac_idle(chan);
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}
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