278 lines
7.8 KiB
C
278 lines
7.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/* exynos_drm_drv.h
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* Authors:
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* Inki Dae <inki.dae@samsung.com>
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* Joonyoung Shim <jy0922.shim@samsung.com>
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* Seung-Woo Kim <sw0312.kim@samsung.com>
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*/
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#ifndef _EXYNOS_DRM_DRV_H_
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#define _EXYNOS_DRM_DRV_H_
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#include <linux/module.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_device.h>
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#include <drm/drm_plane.h>
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#define MAX_CRTC 3
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#define MAX_PLANE 5
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#define MAX_FB_BUFFER 4
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#define DEFAULT_WIN 0
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struct drm_crtc_state;
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struct drm_display_mode;
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#define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc, base)
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#define to_exynos_plane(x) container_of(x, struct exynos_drm_plane, base)
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/* this enumerates display type. */
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enum exynos_drm_output_type {
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EXYNOS_DISPLAY_TYPE_NONE,
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/* RGB or CPU Interface. */
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EXYNOS_DISPLAY_TYPE_LCD,
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/* HDMI Interface. */
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EXYNOS_DISPLAY_TYPE_HDMI,
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/* Virtual Display Interface. */
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EXYNOS_DISPLAY_TYPE_VIDI,
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};
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struct exynos_drm_rect {
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unsigned int x, y;
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unsigned int w, h;
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};
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/*
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* Exynos drm plane state structure.
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*
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* @base: plane_state object (contains drm_framebuffer pointer)
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* @src: rectangle of the source image data to be displayed (clipped to
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* visible part).
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* @crtc: rectangle of the target image position on hardware screen
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* (clipped to visible part).
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* @h_ratio: horizontal scaling ratio, 16.16 fixed point
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* @v_ratio: vertical scaling ratio, 16.16 fixed point
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*
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* this structure consists plane state data that will be applied to hardware
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* specific overlay info.
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*/
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struct exynos_drm_plane_state {
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struct drm_plane_state base;
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struct exynos_drm_rect crtc;
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struct exynos_drm_rect src;
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unsigned int h_ratio;
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unsigned int v_ratio;
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};
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static inline struct exynos_drm_plane_state *
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to_exynos_plane_state(struct drm_plane_state *state)
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{
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return container_of(state, struct exynos_drm_plane_state, base);
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}
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/*
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* Exynos drm common overlay structure.
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*
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* @base: plane object
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* @index: hardware index of the overlay layer
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*
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* this structure is common to exynos SoC and its contents would be copied
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* to hardware specific overlay info.
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*/
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struct exynos_drm_plane {
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struct drm_plane base;
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const struct exynos_drm_plane_config *config;
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unsigned int index;
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};
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#define EXYNOS_DRM_PLANE_CAP_DOUBLE (1 << 0)
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#define EXYNOS_DRM_PLANE_CAP_SCALE (1 << 1)
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#define EXYNOS_DRM_PLANE_CAP_ZPOS (1 << 2)
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#define EXYNOS_DRM_PLANE_CAP_TILE (1 << 3)
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#define EXYNOS_DRM_PLANE_CAP_PIX_BLEND (1 << 4)
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#define EXYNOS_DRM_PLANE_CAP_WIN_BLEND (1 << 5)
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/*
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* Exynos DRM plane configuration structure.
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*
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* @zpos: initial z-position of the plane.
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* @type: type of the plane (primary, cursor or overlay).
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* @pixel_formats: supported pixel formats.
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* @num_pixel_formats: number of elements in 'pixel_formats'.
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* @capabilities: supported features (see EXYNOS_DRM_PLANE_CAP_*)
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*/
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struct exynos_drm_plane_config {
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unsigned int zpos;
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enum drm_plane_type type;
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const uint32_t *pixel_formats;
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unsigned int num_pixel_formats;
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unsigned int capabilities;
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};
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/*
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* Exynos drm crtc ops
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*
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* @atomic_enable: enable the device
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* @atomic_disable: disable the device
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* @enable_vblank: specific driver callback for enabling vblank interrupt.
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* @disable_vblank: specific driver callback for disabling vblank interrupt.
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* @mode_valid: specific driver callback for mode validation
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* @atomic_check: validate state
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* @atomic_begin: prepare device to receive an update
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* @atomic_flush: mark the end of device update
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* @update_plane: apply hardware specific overlay data to registers.
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* @disable_plane: disable hardware specific overlay.
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* @te_handler: trigger to transfer video image at the tearing effect
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* synchronization signal if there is a page flip request.
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*/
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struct exynos_drm_crtc;
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struct exynos_drm_crtc_ops {
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void (*atomic_enable)(struct exynos_drm_crtc *crtc);
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void (*atomic_disable)(struct exynos_drm_crtc *crtc);
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int (*enable_vblank)(struct exynos_drm_crtc *crtc);
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void (*disable_vblank)(struct exynos_drm_crtc *crtc);
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enum drm_mode_status (*mode_valid)(struct exynos_drm_crtc *crtc,
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const struct drm_display_mode *mode);
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bool (*mode_fixup)(struct exynos_drm_crtc *crtc,
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const struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode);
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int (*atomic_check)(struct exynos_drm_crtc *crtc,
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struct drm_crtc_state *state);
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void (*atomic_begin)(struct exynos_drm_crtc *crtc);
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void (*update_plane)(struct exynos_drm_crtc *crtc,
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struct exynos_drm_plane *plane);
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void (*disable_plane)(struct exynos_drm_crtc *crtc,
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struct exynos_drm_plane *plane);
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void (*atomic_flush)(struct exynos_drm_crtc *crtc);
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void (*te_handler)(struct exynos_drm_crtc *crtc);
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};
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struct exynos_drm_clk {
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void (*enable)(struct exynos_drm_clk *clk, bool enable);
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};
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/*
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* Exynos specific crtc structure.
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*
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* @base: crtc object.
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* @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI.
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* @ops: pointer to callbacks for exynos drm specific functionality
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* @ctx: A pointer to the crtc's implementation specific context
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* @pipe_clk: A pointer to the crtc's pipeline clock.
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*/
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struct exynos_drm_crtc {
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struct drm_crtc base;
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enum exynos_drm_output_type type;
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const struct exynos_drm_crtc_ops *ops;
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void *ctx;
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struct exynos_drm_clk *pipe_clk;
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bool i80_mode : 1;
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};
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static inline void exynos_drm_pipe_clk_enable(struct exynos_drm_crtc *crtc,
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bool enable)
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{
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if (crtc->pipe_clk)
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crtc->pipe_clk->enable(crtc->pipe_clk, enable);
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}
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struct drm_exynos_file_private {
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/* for g2d api */
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struct list_head inuse_cmdlist;
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struct list_head event_list;
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struct list_head userptr_list;
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};
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/*
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* Exynos drm private structure.
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*
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* @pending: the crtcs that have pending updates to finish
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* @lock: protect access to @pending
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* @wait: wait an atomic commit to finish
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*/
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struct exynos_drm_private {
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struct drm_fb_helper *fb_helper;
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struct device *g2d_dev;
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struct device *dma_dev;
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void *mapping;
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/* for atomic commit */
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u32 pending;
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spinlock_t lock;
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wait_queue_head_t wait;
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};
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static inline struct device *to_dma_dev(struct drm_device *dev)
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{
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struct exynos_drm_private *priv = dev->dev_private;
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return priv->dma_dev;
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}
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static inline bool is_drm_iommu_supported(struct drm_device *drm_dev)
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{
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struct exynos_drm_private *priv = drm_dev->dev_private;
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return priv->mapping ? true : false;
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}
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int exynos_drm_register_dma(struct drm_device *drm, struct device *dev,
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void **dma_priv);
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void exynos_drm_unregister_dma(struct drm_device *drm, struct device *dev,
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void **dma_priv);
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void exynos_drm_cleanup_dma(struct drm_device *drm);
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#ifdef CONFIG_DRM_EXYNOS_DPI
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struct drm_encoder *exynos_dpi_probe(struct device *dev);
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int exynos_dpi_remove(struct drm_encoder *encoder);
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int exynos_dpi_bind(struct drm_device *dev, struct drm_encoder *encoder);
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#else
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static inline struct drm_encoder *
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exynos_dpi_probe(struct device *dev) { return NULL; }
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static inline int exynos_dpi_remove(struct drm_encoder *encoder)
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{
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return 0;
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}
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static inline int exynos_dpi_bind(struct drm_device *dev,
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struct drm_encoder *encoder)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_DRM_EXYNOS_FIMC
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int exynos_drm_check_fimc_device(struct device *dev);
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#else
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static inline int exynos_drm_check_fimc_device(struct device *dev)
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{
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return 0;
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}
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#endif
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int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state,
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bool nonblock);
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extern struct platform_driver fimd_driver;
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extern struct platform_driver exynos5433_decon_driver;
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extern struct platform_driver decon_driver;
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extern struct platform_driver dp_driver;
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extern struct platform_driver dsi_driver;
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extern struct platform_driver mixer_driver;
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extern struct platform_driver hdmi_driver;
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extern struct platform_driver vidi_driver;
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extern struct platform_driver g2d_driver;
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extern struct platform_driver fimc_driver;
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extern struct platform_driver rotator_driver;
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extern struct platform_driver scaler_driver;
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extern struct platform_driver gsc_driver;
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extern struct platform_driver mic_driver;
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#endif
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