166 lines
3.6 KiB
C
166 lines
3.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright(c) 2016, Analogix Semiconductor.
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*
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* Based on anx7808 driver obtained from chromeos with copyright:
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* Copyright(c) 2013, Google Inc.
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*/
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#include <linux/regmap.h>
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#include <drm/drm.h>
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#include <drm/drm_dp_helper.h>
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#include <drm/drm_print.h>
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#include "analogix-i2c-dptx.h"
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#define AUX_WAIT_TIMEOUT_MS 15
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#define AUX_CH_BUFFER_SIZE 16
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static int anx_i2c_dp_clear_bits(struct regmap *map, u8 reg, u8 mask)
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{
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return regmap_update_bits(map, reg, mask, 0);
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}
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static bool anx_dp_aux_op_finished(struct regmap *map_dptx)
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{
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unsigned int value;
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int err;
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err = regmap_read(map_dptx, SP_DP_AUX_CH_CTRL2_REG, &value);
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if (err < 0)
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return false;
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return (value & SP_AUX_EN) == 0;
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}
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static int anx_dp_aux_wait(struct regmap *map_dptx)
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{
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unsigned long timeout;
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unsigned int status;
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int err;
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timeout = jiffies + msecs_to_jiffies(AUX_WAIT_TIMEOUT_MS) + 1;
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while (!anx_dp_aux_op_finished(map_dptx)) {
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if (time_after(jiffies, timeout)) {
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if (!anx_dp_aux_op_finished(map_dptx)) {
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DRM_ERROR("Timed out waiting AUX to finish\n");
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return -ETIMEDOUT;
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}
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break;
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}
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usleep_range(1000, 2000);
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}
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/* Read the AUX channel access status */
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err = regmap_read(map_dptx, SP_AUX_CH_STATUS_REG, &status);
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if (err < 0) {
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DRM_ERROR("Failed to read from AUX channel: %d\n", err);
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return err;
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}
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if (status & SP_AUX_STATUS) {
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DRM_ERROR("Failed to wait for AUX channel (status: %02x)\n",
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status);
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return -ETIMEDOUT;
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}
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return 0;
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}
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static int anx_dp_aux_address(struct regmap *map_dptx, unsigned int addr)
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{
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int err;
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err = regmap_write(map_dptx, SP_AUX_ADDR_7_0_REG, addr & 0xff);
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if (err)
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return err;
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err = regmap_write(map_dptx, SP_AUX_ADDR_15_8_REG,
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(addr & 0xff00) >> 8);
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if (err)
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return err;
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/*
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* DP AUX CH Address Register #2, only update bits[3:0]
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* [7:4] RESERVED
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* [3:0] AUX_ADDR[19:16], Register control AUX CH address.
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*/
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err = regmap_update_bits(map_dptx, SP_AUX_ADDR_19_16_REG,
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SP_AUX_ADDR_19_16_MASK,
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(addr & 0xf0000) >> 16);
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if (err)
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return err;
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return 0;
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}
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ssize_t anx_dp_aux_transfer(struct regmap *map_dptx,
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struct drm_dp_aux_msg *msg)
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{
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u8 ctrl1 = msg->request;
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u8 ctrl2 = SP_AUX_EN;
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u8 *buffer = msg->buffer;
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int err;
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/* The DP AUX transmit and receive buffer has 16 bytes. */
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if (WARN_ON(msg->size > AUX_CH_BUFFER_SIZE))
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return -E2BIG;
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/* Zero-sized messages specify address-only transactions. */
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if (msg->size < 1)
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ctrl2 |= SP_ADDR_ONLY;
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else /* For non-zero-sized set the length field. */
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ctrl1 |= (msg->size - 1) << SP_AUX_LENGTH_SHIFT;
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if ((msg->size > 0) && ((msg->request & DP_AUX_I2C_READ) == 0)) {
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/* When WRITE | MOT write values to data buffer */
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err = regmap_bulk_write(map_dptx,
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SP_DP_BUF_DATA0_REG, buffer,
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msg->size);
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if (err)
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return err;
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}
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/* Write address and request */
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err = anx_dp_aux_address(map_dptx, msg->address);
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if (err)
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return err;
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err = regmap_write(map_dptx, SP_DP_AUX_CH_CTRL1_REG, ctrl1);
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if (err)
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return err;
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/* Start transaction */
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err = regmap_update_bits(map_dptx, SP_DP_AUX_CH_CTRL2_REG,
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SP_ADDR_ONLY | SP_AUX_EN, ctrl2);
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if (err)
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return err;
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err = anx_dp_aux_wait(map_dptx);
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if (err)
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return err;
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msg->reply = DP_AUX_I2C_REPLY_ACK;
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if ((msg->size > 0) && (msg->request & DP_AUX_I2C_READ)) {
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/* Read values from data buffer */
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err = regmap_bulk_read(map_dptx,
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SP_DP_BUF_DATA0_REG, buffer,
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msg->size);
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if (err)
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return err;
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}
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err = anx_i2c_dp_clear_bits(map_dptx, SP_DP_AUX_CH_CTRL2_REG,
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SP_ADDR_ONLY);
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if (err)
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return err;
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return msg->size;
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}
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EXPORT_SYMBOL_GPL(anx_dp_aux_transfer);
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