156 lines
3.6 KiB
C
156 lines
3.6 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef KFD_PM4_HEADERS_H_
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#define KFD_PM4_HEADERS_H_
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#ifndef PM4_MES_HEADER_DEFINED
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#define PM4_MES_HEADER_DEFINED
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union PM4_MES_TYPE_3_HEADER {
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struct {
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/* reserved */
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uint32_t reserved1:8;
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/* IT opcode */
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uint32_t opcode:8;
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/* number of DWORDs - 1 in the information body */
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uint32_t count:14;
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/* packet identifier. It should be 3 for type 3 packets */
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uint32_t type:2;
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};
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uint32_t u32all;
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};
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#endif /* PM4_MES_HEADER_DEFINED */
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/*--------------------MES_MAP_PROCESS-------------------- */
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#ifndef PM4_MES_MAP_PROCESS_DEFINED
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#define PM4_MES_MAP_PROCESS_DEFINED
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struct pm4_map_process {
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union {
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union PM4_MES_TYPE_3_HEADER header; /* header */
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uint32_t ordinal1;
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};
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union {
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struct {
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uint32_t pasid:16;
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uint32_t reserved1:8;
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uint32_t diq_enable:1;
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uint32_t process_quantum:7;
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} bitfields2;
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uint32_t ordinal2;
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};
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union {
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struct {
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uint32_t page_table_base:28;
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uint32_t reserved3:4;
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} bitfields3;
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uint32_t ordinal3;
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};
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uint32_t sh_mem_bases;
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uint32_t sh_mem_ape1_base;
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uint32_t sh_mem_ape1_limit;
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uint32_t sh_mem_config;
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uint32_t gds_addr_lo;
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uint32_t gds_addr_hi;
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union {
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struct {
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uint32_t num_gws:6;
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uint32_t reserved4:2;
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uint32_t num_oac:4;
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uint32_t reserved5:4;
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uint32_t gds_size:6;
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uint32_t num_queues:10;
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} bitfields10;
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uint32_t ordinal10;
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};
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};
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#endif
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#ifndef PM4_MES_MAP_PROCESS_DEFINED_KV_SCRATCH
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#define PM4_MES_MAP_PROCESS_DEFINED_KV_SCRATCH
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struct pm4_map_process_scratch_kv {
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union {
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union PM4_MES_TYPE_3_HEADER header; /* header */
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uint32_t ordinal1;
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};
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union {
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struct {
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uint32_t pasid:16;
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uint32_t reserved1:8;
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uint32_t diq_enable:1;
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uint32_t process_quantum:7;
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} bitfields2;
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uint32_t ordinal2;
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};
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union {
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struct {
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uint32_t page_table_base:28;
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uint32_t reserved2:4;
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} bitfields3;
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uint32_t ordinal3;
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};
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uint32_t reserved3;
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uint32_t sh_mem_bases;
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uint32_t sh_mem_config;
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uint32_t sh_mem_ape1_base;
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uint32_t sh_mem_ape1_limit;
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uint32_t sh_hidden_private_base_vmid;
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uint32_t reserved4;
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uint32_t reserved5;
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uint32_t gds_addr_lo;
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uint32_t gds_addr_hi;
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union {
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struct {
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uint32_t num_gws:6;
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uint32_t reserved6:2;
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uint32_t num_oac:4;
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uint32_t reserved7:4;
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uint32_t gds_size:6;
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uint32_t num_queues:10;
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} bitfields14;
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uint32_t ordinal14;
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};
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uint32_t completion_signal_lo32;
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uint32_t completion_signal_hi32;
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};
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#endif
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enum {
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CACHE_FLUSH_AND_INV_TS_EVENT = 0x00000014
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};
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#endif /* KFD_PM4_HEADERS_H_ */
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