76 lines
1.6 KiB
YAML
76 lines
1.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings
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maintainers:
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- Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
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description: |+
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Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
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node is used to reference the base address of eMMC phy registers.
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The eMMC PHY node should be the child of a syscon node with the
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required property:
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- compatible: Should be one of the following:
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"intel,lgm-syscon", "syscon"
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- reg:
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maxItems: 1
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properties:
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compatible:
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enum:
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- intel,lgm-emmc-phy
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- intel,keembay-emmc-phy
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"#phy-cells":
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const: 0
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: emmcclk
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required:
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- "#phy-cells"
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- compatible
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- reg
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- clocks
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additionalProperties: false
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examples:
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- |
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sysconf: chiptop@e0200000 {
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compatible = "intel,lgm-syscon", "syscon";
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reg = <0xe0200000 0x100>;
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#address-cells = <1>;
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#size-cells = <1>;
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emmc_phy: emmc-phy@a8 {
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compatible = "intel,lgm-emmc-phy";
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reg = <0x00a8 0x10>;
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clocks = <&emmc>;
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#phy-cells = <0>;
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};
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};
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- |
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phy@20290000 {
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compatible = "intel,keembay-emmc-phy";
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reg = <0x20290000 0x54>;
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clocks = <&emmc>;
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clock-names = "emmcclk";
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#phy-cells = <0>;
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};
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...
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