101 lines
2.8 KiB
YAML
101 lines
2.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pci/intel,ixp4xx-pci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Intel IXP4xx PCI controller
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maintainers:
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- Linus Walleij <linus.walleij@linaro.org>
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description: PCI host controller found in the Intel IXP4xx SoC series.
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allOf:
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- $ref: /schemas/pci/pci-bus.yaml#
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properties:
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compatible:
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items:
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- enum:
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- intel,ixp42x-pci
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- intel,ixp43x-pci
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description: The two supported variants are ixp42x and ixp43x,
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though more variants may exist.
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reg:
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items:
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- description: IXP4xx-specific registers
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interrupts:
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items:
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- description: Main PCI interrupt
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- description: PCI DMA interrupt 1
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- description: PCI DMA interrupt 2
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ranges:
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maxItems: 2
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description: Typically one memory range of 64MB and one IO
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space range of 64KB.
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dma-ranges:
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maxItems: 1
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description: The DMA range tells the PCI host which addresses
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the RAM is at. It can map only 64MB so if the RAM is bigger
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than 64MB the DMA access has to be restricted to these
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addresses.
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"#interrupt-cells": true
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interrupt-map: true
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interrupt-map-mask:
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items:
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- const: 0xf800
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- const: 0
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- const: 0
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- const: 7
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required:
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- compatible
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- reg
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- dma-ranges
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- "#interrupt-cells"
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- interrupt-map
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- interrupt-map-mask
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unevaluatedProperties: false
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examples:
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- |
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pci@c0000000 {
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compatible = "intel,ixp43x-pci";
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reg = <0xc0000000 0x1000>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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bus-range = <0x00 0xff>;
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ranges =
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<0x02000000 0 0x48000000 0x48000000 0 0x04000000>,
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<0x01000000 0 0x00000000 0x4c000000 0 0x00010000>;
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dma-ranges =
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<0x02000000 0 0x00000000 0x00000000 0 0x04000000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0xf800 0 0 7>;
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interrupt-map =
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<0x0800 0 0 1 &gpio0 11 3>, /* INT A on slot 1 is irq 11 */
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<0x0800 0 0 2 &gpio0 10 3>, /* INT B on slot 1 is irq 10 */
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<0x0800 0 0 3 &gpio0 9 3>, /* INT C on slot 1 is irq 9 */
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<0x0800 0 0 4 &gpio0 8 3>, /* INT D on slot 1 is irq 8 */
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<0x1000 0 0 1 &gpio0 10 3>, /* INT A on slot 2 is irq 10 */
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<0x1000 0 0 2 &gpio0 9 3>, /* INT B on slot 2 is irq 9 */
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<0x1000 0 0 3 &gpio0 8 3>, /* INT C on slot 2 is irq 8 */
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<0x1000 0 0 4 &gpio0 11 3>, /* INT D on slot 2 is irq 11 */
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<0x1800 0 0 1 &gpio0 9 3>, /* INT A on slot 3 is irq 9 */
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<0x1800 0 0 2 &gpio0 8 3>, /* INT B on slot 3 is irq 8 */
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<0x1800 0 0 3 &gpio0 11 3>, /* INT C on slot 3 is irq 11 */
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<0x1800 0 0 4 &gpio0 10 3>; /* INT D on slot 3 is irq 10 */
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};
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