220 lines
6.4 KiB
C
220 lines
6.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* KVM guest debug register tests
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*
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* Copyright (C) 2020, Red Hat, Inc.
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*/
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#include <stdio.h>
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#include <string.h>
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#include "kvm_util.h"
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#include "processor.h"
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#include "apic.h"
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#define VCPU_ID 0
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#define DR6_BD (1 << 13)
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#define DR7_GD (1 << 13)
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#define IRQ_VECTOR 0xAA
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/* For testing data access debug BP */
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uint32_t guest_value;
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extern unsigned char sw_bp, hw_bp, write_data, ss_start, bd_start;
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static void guest_code(void)
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{
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/* Create a pending interrupt on current vCPU */
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x2apic_enable();
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x2apic_write_reg(APIC_ICR, APIC_DEST_SELF | APIC_INT_ASSERT |
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APIC_DM_FIXED | IRQ_VECTOR);
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/*
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* Software BP tests.
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*
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* NOTE: sw_bp need to be before the cmd here, because int3 is an
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* exception rather than a normal trap for KVM_SET_GUEST_DEBUG (we
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* capture it using the vcpu exception bitmap).
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*/
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asm volatile("sw_bp: int3");
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/* Hardware instruction BP test */
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asm volatile("hw_bp: nop");
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/* Hardware data BP test */
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asm volatile("mov $1234,%%rax;\n\t"
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"mov %%rax,%0;\n\t write_data:"
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: "=m" (guest_value) : : "rax");
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/*
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* Single step test, covers 2 basic instructions and 2 emulated
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*
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* Enable interrupts during the single stepping to see that
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* pending interrupt we raised is not handled due to KVM_GUESTDBG_BLOCKIRQ
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*/
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asm volatile("ss_start: "
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"sti\n\t"
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"xor %%eax,%%eax\n\t"
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"cpuid\n\t"
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"movl $0x1a0,%%ecx\n\t"
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"rdmsr\n\t"
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"cli\n\t"
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: : : "eax", "ebx", "ecx", "edx");
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/* DR6.BD test */
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asm volatile("bd_start: mov %%dr0, %%rax" : : : "rax");
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GUEST_DONE();
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}
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#define CLEAR_DEBUG() memset(&debug, 0, sizeof(debug))
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#define APPLY_DEBUG() vcpu_set_guest_debug(vm, VCPU_ID, &debug)
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#define CAST_TO_RIP(v) ((unsigned long long)&(v))
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#define SET_RIP(v) do { \
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vcpu_regs_get(vm, VCPU_ID, ®s); \
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regs.rip = (v); \
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vcpu_regs_set(vm, VCPU_ID, ®s); \
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} while (0)
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#define MOVE_RIP(v) SET_RIP(regs.rip + (v));
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int main(void)
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{
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struct kvm_guest_debug debug;
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unsigned long long target_dr6, target_rip;
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struct kvm_regs regs;
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struct kvm_run *run;
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struct kvm_vm *vm;
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struct ucall uc;
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uint64_t cmd;
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int i;
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/* Instruction lengths starting at ss_start */
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int ss_size[6] = {
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1, /* sti*/
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2, /* xor */
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2, /* cpuid */
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5, /* mov */
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2, /* rdmsr */
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1, /* cli */
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};
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if (!kvm_check_cap(KVM_CAP_SET_GUEST_DEBUG)) {
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print_skip("KVM_CAP_SET_GUEST_DEBUG not supported");
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return 0;
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}
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vm = vm_create_default(VCPU_ID, 0, guest_code);
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run = vcpu_state(vm, VCPU_ID);
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/* Test software BPs - int3 */
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CLEAR_DEBUG();
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debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
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APPLY_DEBUG();
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vcpu_run(vm, VCPU_ID);
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TEST_ASSERT(run->exit_reason == KVM_EXIT_DEBUG &&
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run->debug.arch.exception == BP_VECTOR &&
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run->debug.arch.pc == CAST_TO_RIP(sw_bp),
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"INT3: exit %d exception %d rip 0x%llx (should be 0x%llx)",
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run->exit_reason, run->debug.arch.exception,
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run->debug.arch.pc, CAST_TO_RIP(sw_bp));
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MOVE_RIP(1);
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/* Test instruction HW BP over DR[0-3] */
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for (i = 0; i < 4; i++) {
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CLEAR_DEBUG();
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debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP;
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debug.arch.debugreg[i] = CAST_TO_RIP(hw_bp);
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debug.arch.debugreg[7] = 0x400 | (1UL << (2*i+1));
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APPLY_DEBUG();
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vcpu_run(vm, VCPU_ID);
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target_dr6 = 0xffff0ff0 | (1UL << i);
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TEST_ASSERT(run->exit_reason == KVM_EXIT_DEBUG &&
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run->debug.arch.exception == DB_VECTOR &&
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run->debug.arch.pc == CAST_TO_RIP(hw_bp) &&
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run->debug.arch.dr6 == target_dr6,
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"INS_HW_BP (DR%d): exit %d exception %d rip 0x%llx "
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"(should be 0x%llx) dr6 0x%llx (should be 0x%llx)",
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i, run->exit_reason, run->debug.arch.exception,
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run->debug.arch.pc, CAST_TO_RIP(hw_bp),
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run->debug.arch.dr6, target_dr6);
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}
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/* Skip "nop" */
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MOVE_RIP(1);
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/* Test data access HW BP over DR[0-3] */
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for (i = 0; i < 4; i++) {
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CLEAR_DEBUG();
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debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP;
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debug.arch.debugreg[i] = CAST_TO_RIP(guest_value);
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debug.arch.debugreg[7] = 0x00000400 | (1UL << (2*i+1)) |
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(0x000d0000UL << (4*i));
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APPLY_DEBUG();
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vcpu_run(vm, VCPU_ID);
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target_dr6 = 0xffff0ff0 | (1UL << i);
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TEST_ASSERT(run->exit_reason == KVM_EXIT_DEBUG &&
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run->debug.arch.exception == DB_VECTOR &&
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run->debug.arch.pc == CAST_TO_RIP(write_data) &&
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run->debug.arch.dr6 == target_dr6,
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"DATA_HW_BP (DR%d): exit %d exception %d rip 0x%llx "
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"(should be 0x%llx) dr6 0x%llx (should be 0x%llx)",
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i, run->exit_reason, run->debug.arch.exception,
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run->debug.arch.pc, CAST_TO_RIP(write_data),
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run->debug.arch.dr6, target_dr6);
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/* Rollback the 4-bytes "mov" */
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MOVE_RIP(-7);
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}
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/* Skip the 4-bytes "mov" */
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MOVE_RIP(7);
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/* Test single step */
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target_rip = CAST_TO_RIP(ss_start);
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target_dr6 = 0xffff4ff0ULL;
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vcpu_regs_get(vm, VCPU_ID, ®s);
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for (i = 0; i < (sizeof(ss_size) / sizeof(ss_size[0])); i++) {
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target_rip += ss_size[i];
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CLEAR_DEBUG();
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debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_SINGLESTEP |
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KVM_GUESTDBG_BLOCKIRQ;
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debug.arch.debugreg[7] = 0x00000400;
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APPLY_DEBUG();
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vcpu_run(vm, VCPU_ID);
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TEST_ASSERT(run->exit_reason == KVM_EXIT_DEBUG &&
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run->debug.arch.exception == DB_VECTOR &&
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run->debug.arch.pc == target_rip &&
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run->debug.arch.dr6 == target_dr6,
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"SINGLE_STEP[%d]: exit %d exception %d rip 0x%llx "
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"(should be 0x%llx) dr6 0x%llx (should be 0x%llx)",
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i, run->exit_reason, run->debug.arch.exception,
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run->debug.arch.pc, target_rip, run->debug.arch.dr6,
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target_dr6);
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}
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/* Finally test global disable */
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CLEAR_DEBUG();
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debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP;
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debug.arch.debugreg[7] = 0x400 | DR7_GD;
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APPLY_DEBUG();
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vcpu_run(vm, VCPU_ID);
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target_dr6 = 0xffff0ff0 | DR6_BD;
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TEST_ASSERT(run->exit_reason == KVM_EXIT_DEBUG &&
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run->debug.arch.exception == DB_VECTOR &&
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run->debug.arch.pc == CAST_TO_RIP(bd_start) &&
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run->debug.arch.dr6 == target_dr6,
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"DR7.GD: exit %d exception %d rip 0x%llx "
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"(should be 0x%llx) dr6 0x%llx (should be 0x%llx)",
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run->exit_reason, run->debug.arch.exception,
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run->debug.arch.pc, target_rip, run->debug.arch.dr6,
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target_dr6);
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/* Disable all debug controls, run to the end */
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CLEAR_DEBUG();
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APPLY_DEBUG();
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vcpu_run(vm, VCPU_ID);
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TEST_ASSERT(run->exit_reason == KVM_EXIT_IO, "KVM_EXIT_IO");
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cmd = get_ucall(vm, VCPU_ID, &uc);
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TEST_ASSERT(cmd == UCALL_DONE, "UCALL_DONE");
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kvm_vm_free(vm);
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return 0;
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}
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