281 lines
6.4 KiB
C
281 lines
6.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020 Marek Vasut <marex@denx.de>
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*
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* Based on tc358764.c by
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* Andrzej Hajda <a.hajda@samsung.com>
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* Maciej Purski <m.purski@samsung.com>
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*
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* Based on rpi_touchscreen.c by
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* Eric Anholt <eric@anholt.net>
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*/
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/of_graph.h>
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#include <linux/regulator/consumer.h>
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#include <video/mipi_display.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_mipi_dsi.h>
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#include <drm/drm_of.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_print.h>
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#include <drm/drm_probe_helper.h>
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/* PPI layer registers */
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#define PPI_STARTPPI 0x0104 /* START control bit */
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#define PPI_LPTXTIMECNT 0x0114 /* LPTX timing signal */
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#define PPI_D0S_ATMR 0x0144
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#define PPI_D1S_ATMR 0x0148
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#define PPI_D0S_CLRSIPOCOUNT 0x0164 /* Assertion timer for Lane 0 */
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#define PPI_D1S_CLRSIPOCOUNT 0x0168 /* Assertion timer for Lane 1 */
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#define PPI_START_FUNCTION 1
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/* DSI layer registers */
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#define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */
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#define DSI_LANEENABLE 0x0210 /* Enables each lane */
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#define DSI_RX_START 1
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/* LCDC/DPI Host Registers */
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#define LCDCTRL 0x0420
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/* SPI Master Registers */
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#define SPICMR 0x0450
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#define SPITCR 0x0454
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/* System Controller Registers */
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#define SYSCTRL 0x0464
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/* System registers */
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#define LPX_PERIOD 3
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/* Lane enable PPI and DSI register bits */
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#define LANEENABLE_CLEN BIT(0)
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#define LANEENABLE_L0EN BIT(1)
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#define LANEENABLE_L1EN BIT(2)
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struct tc358762 {
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struct device *dev;
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struct drm_bridge bridge;
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struct drm_connector connector;
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struct regulator *regulator;
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struct drm_bridge *panel_bridge;
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bool pre_enabled;
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int error;
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};
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static int tc358762_clear_error(struct tc358762 *ctx)
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{
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int ret = ctx->error;
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ctx->error = 0;
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return ret;
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}
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static void tc358762_write(struct tc358762 *ctx, u16 addr, u32 val)
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{
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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ssize_t ret;
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u8 data[6];
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if (ctx->error)
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return;
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data[0] = addr;
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data[1] = addr >> 8;
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data[2] = val;
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data[3] = val >> 8;
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data[4] = val >> 16;
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data[5] = val >> 24;
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ret = mipi_dsi_generic_write(dsi, data, sizeof(data));
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if (ret < 0)
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ctx->error = ret;
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}
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static inline struct tc358762 *bridge_to_tc358762(struct drm_bridge *bridge)
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{
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return container_of(bridge, struct tc358762, bridge);
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}
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static int tc358762_init(struct tc358762 *ctx)
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{
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tc358762_write(ctx, DSI_LANEENABLE,
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LANEENABLE_L0EN | LANEENABLE_CLEN);
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tc358762_write(ctx, PPI_D0S_CLRSIPOCOUNT, 5);
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tc358762_write(ctx, PPI_D1S_CLRSIPOCOUNT, 5);
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tc358762_write(ctx, PPI_D0S_ATMR, 0);
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tc358762_write(ctx, PPI_D1S_ATMR, 0);
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tc358762_write(ctx, PPI_LPTXTIMECNT, LPX_PERIOD);
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tc358762_write(ctx, SPICMR, 0x00);
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tc358762_write(ctx, LCDCTRL, 0x00100150);
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tc358762_write(ctx, SYSCTRL, 0x040f);
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msleep(100);
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tc358762_write(ctx, PPI_STARTPPI, PPI_START_FUNCTION);
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tc358762_write(ctx, DSI_STARTDSI, DSI_RX_START);
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msleep(100);
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return tc358762_clear_error(ctx);
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}
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static void tc358762_post_disable(struct drm_bridge *bridge)
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{
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struct tc358762 *ctx = bridge_to_tc358762(bridge);
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int ret;
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/*
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* The post_disable hook might be called multiple times.
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* We want to avoid regulator imbalance below.
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*/
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if (!ctx->pre_enabled)
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return;
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ctx->pre_enabled = false;
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ret = regulator_disable(ctx->regulator);
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if (ret < 0)
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dev_err(ctx->dev, "error disabling regulators (%d)\n", ret);
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}
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static void tc358762_pre_enable(struct drm_bridge *bridge)
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{
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struct tc358762 *ctx = bridge_to_tc358762(bridge);
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int ret;
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ret = regulator_enable(ctx->regulator);
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if (ret < 0)
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dev_err(ctx->dev, "error enabling regulators (%d)\n", ret);
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ret = tc358762_init(ctx);
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if (ret < 0)
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dev_err(ctx->dev, "error initializing bridge (%d)\n", ret);
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ctx->pre_enabled = true;
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}
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static int tc358762_attach(struct drm_bridge *bridge,
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enum drm_bridge_attach_flags flags)
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{
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struct tc358762 *ctx = bridge_to_tc358762(bridge);
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return drm_bridge_attach(bridge->encoder, ctx->panel_bridge,
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bridge, flags);
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}
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static const struct drm_bridge_funcs tc358762_bridge_funcs = {
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.post_disable = tc358762_post_disable,
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.pre_enable = tc358762_pre_enable,
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.attach = tc358762_attach,
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};
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static int tc358762_parse_dt(struct tc358762 *ctx)
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{
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struct drm_bridge *panel_bridge;
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struct device *dev = ctx->dev;
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struct drm_panel *panel;
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int ret;
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ret = drm_of_find_panel_or_bridge(dev->of_node, 1, 0, &panel, NULL);
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if (ret)
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return ret;
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panel_bridge = devm_drm_panel_bridge_add(dev, panel);
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if (IS_ERR(panel_bridge))
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return PTR_ERR(panel_bridge);
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ctx->panel_bridge = panel_bridge;
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return 0;
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}
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static int tc358762_configure_regulators(struct tc358762 *ctx)
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{
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ctx->regulator = devm_regulator_get(ctx->dev, "vddc");
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if (IS_ERR(ctx->regulator))
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return PTR_ERR(ctx->regulator);
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return 0;
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}
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static int tc358762_probe(struct mipi_dsi_device *dsi)
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{
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struct device *dev = &dsi->dev;
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struct tc358762 *ctx;
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int ret;
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ctx = devm_kzalloc(dev, sizeof(struct tc358762), GFP_KERNEL);
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if (!ctx)
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return -ENOMEM;
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mipi_dsi_set_drvdata(dsi, ctx);
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ctx->dev = dev;
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ctx->pre_enabled = false;
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/* TODO: Find out how to get dual-lane mode working */
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dsi->lanes = 1;
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dsi->format = MIPI_DSI_FMT_RGB888;
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dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
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MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_VIDEO_HSE;
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ret = tc358762_parse_dt(ctx);
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if (ret < 0)
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return ret;
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ret = tc358762_configure_regulators(ctx);
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if (ret < 0)
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return ret;
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ctx->bridge.funcs = &tc358762_bridge_funcs;
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ctx->bridge.type = DRM_MODE_CONNECTOR_DPI;
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ctx->bridge.of_node = dev->of_node;
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drm_bridge_add(&ctx->bridge);
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ret = mipi_dsi_attach(dsi);
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if (ret < 0) {
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drm_bridge_remove(&ctx->bridge);
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dev_err(dev, "failed to attach dsi\n");
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}
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return ret;
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}
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static int tc358762_remove(struct mipi_dsi_device *dsi)
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{
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struct tc358762 *ctx = mipi_dsi_get_drvdata(dsi);
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mipi_dsi_detach(dsi);
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drm_bridge_remove(&ctx->bridge);
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return 0;
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}
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static const struct of_device_id tc358762_of_match[] = {
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{ .compatible = "toshiba,tc358762" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, tc358762_of_match);
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static struct mipi_dsi_driver tc358762_driver = {
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.probe = tc358762_probe,
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.remove = tc358762_remove,
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.driver = {
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.name = "tc358762",
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.of_match_table = tc358762_of_match,
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},
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};
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module_mipi_dsi_driver(tc358762_driver);
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MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
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MODULE_DESCRIPTION("MIPI-DSI based Driver for TC358762 DSI/DPI Bridge");
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MODULE_LICENSE("GPL v2");
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