80 lines
1.7 KiB
YAML
80 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs
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maintainers:
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- Philipp Zabel <p.zabel@pengutronix.de>
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description:
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Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs.
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properties:
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compatible:
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const: nxp,imx8mq-vpu
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reg:
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maxItems: 3
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reg-names:
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items:
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- const: g1
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- const: g2
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- const: ctrl
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interrupts:
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maxItems: 2
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interrupt-names:
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items:
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- const: g1
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- const: g2
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: g1
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- const: g2
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- const: bus
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8mq-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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vpu: video-codec@38300000 {
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compatible = "nxp,imx8mq-vpu";
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reg = <0x38300000 0x10000>,
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<0x38310000 0x10000>,
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<0x38320000 0x10000>;
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reg-names = "g1", "g2", "ctrl";
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "g1", "g2";
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clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
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<&clk IMX8MQ_CLK_VPU_G2_ROOT>,
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<&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
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clock-names = "g1", "g2", "bus";
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power-domains = <&pgc_vpu>;
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};
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