kernel/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml
2024-07-22 17:22:30 +08:00

62 lines
1.4 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Loongson-3 HyperTransport Interrupt Controller
maintainers:
- Jiaxun Yang <jiaxun.yang@flygoat.com>
allOf:
- $ref: /schemas/interrupt-controller.yaml#
description: |
This interrupt controller is found in the Loongson-3 family of chips to transmit
interrupts from PCH PIC connected on HyperTransport bus.
properties:
compatible:
const: loongson,htpic-1.0
reg:
maxItems: 1
interrupts:
minItems: 1
maxItems: 4
description: |
Four parent interrupts that receive chained interrupts.
interrupt-controller: true
'#interrupt-cells':
const: 1
required:
- compatible
- reg
- interrupts
- interrupt-controller
- '#interrupt-cells'
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
htintc: interrupt-controller@1fb000080 {
compatible = "loongson,htpic-1.0";
reg = <0xfb000080 0x40>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&liointc>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
<25 IRQ_TYPE_LEVEL_HIGH>,
<26 IRQ_TYPE_LEVEL_HIGH>,
<27 IRQ_TYPE_LEVEL_HIGH>;
};
...