285 lines
7.4 KiB
YAML
285 lines
7.4 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Allwinner R40 TCON TOP Device Tree Bindings
|
|
|
|
maintainers:
|
|
- Chen-Yu Tsai <wens@csie.org>
|
|
- Maxime Ripard <mripard@kernel.org>
|
|
|
|
description: |
|
|
TCON TOPs main purpose is to configure whole display pipeline. It
|
|
determines relationships between mixers and TCONs, selects source
|
|
TCON for HDMI, muxes LCD and TV encoder GPIO output, selects TV
|
|
encoder clock source and contains additional TV TCON and DSI gates.
|
|
|
|
It allows display pipeline to be configured in very different ways:
|
|
|
|
/ LCD0/LVDS0
|
|
/ [0] TCON-LCD0
|
|
| \ MIPI DSI
|
|
mixer0 |
|
|
\ / [1] TCON-LCD1 - LCD1/LVDS1
|
|
TCON-TOP
|
|
/ \ [2] TCON-TV0 [0] - TVE0/RGB
|
|
mixer1 | \
|
|
| TCON-TOP - HDMI
|
|
| /
|
|
\ [3] TCON-TV1 [1] - TVE1/RGB
|
|
|
|
Note that both TCON TOP references same physical unit. Both mixers
|
|
can be connected to any TCON. Not all TCON TOP variants support all
|
|
features.
|
|
|
|
properties:
|
|
"#clock-cells":
|
|
const: 1
|
|
|
|
compatible:
|
|
enum:
|
|
- allwinner,sun8i-r40-tcon-top
|
|
- allwinner,sun50i-h6-tcon-top
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
minItems: 2
|
|
items:
|
|
- description: The TCON TOP interface clock
|
|
- description: The TCON TOP TV0 clock
|
|
- description: The TCON TOP TVE0 clock
|
|
- description: The TCON TOP TV1 clock
|
|
- description: The TCON TOP TVE1 clock
|
|
- description: The TCON TOP MIPI DSI clock
|
|
|
|
clock-names:
|
|
minItems: 2
|
|
items:
|
|
- const: bus
|
|
- const: tcon-tv0
|
|
- const: tve0
|
|
- const: tcon-tv1
|
|
- const: tve1
|
|
- const: dsi
|
|
|
|
clock-output-names:
|
|
minItems: 1
|
|
maxItems: 3
|
|
description: >
|
|
The first item is the name of the clock created for the TV0
|
|
channel, the second item is the name of the TCON TV1 channel
|
|
clock and the third one is the name of the DSI channel clock.
|
|
|
|
resets:
|
|
maxItems: 1
|
|
|
|
ports:
|
|
$ref: /schemas/graph.yaml#/properties/ports
|
|
|
|
properties:
|
|
port@0:
|
|
$ref: /schemas/graph.yaml#/properties/port
|
|
description: |
|
|
Input endpoint for Mixer 0 mux.
|
|
|
|
port@1:
|
|
$ref: /schemas/graph.yaml#/properties/port
|
|
description: |
|
|
Output endpoint for Mixer 0 mux
|
|
|
|
port@2:
|
|
$ref: /schemas/graph.yaml#/properties/port
|
|
description: |
|
|
Input endpoint for Mixer 1 mux.
|
|
|
|
port@3:
|
|
$ref: /schemas/graph.yaml#/properties/port
|
|
description: |
|
|
Output endpoint for Mixer 1 mux
|
|
|
|
port@4:
|
|
$ref: /schemas/graph.yaml#/properties/port
|
|
description: |
|
|
Input endpoint for HDMI mux.
|
|
|
|
port@5:
|
|
$ref: /schemas/graph.yaml#/properties/port
|
|
description: |
|
|
Output endpoint for HDMI mux
|
|
|
|
required:
|
|
- port@0
|
|
- port@1
|
|
- port@4
|
|
- port@5
|
|
|
|
required:
|
|
- "#clock-cells"
|
|
- compatible
|
|
- reg
|
|
- clocks
|
|
- clock-names
|
|
- clock-output-names
|
|
- resets
|
|
- ports
|
|
|
|
additionalProperties: false
|
|
|
|
if:
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
const: allwinner,sun50i-h6-tcon-top
|
|
|
|
then:
|
|
properties:
|
|
clocks:
|
|
maxItems: 2
|
|
|
|
clock-output-names:
|
|
maxItems: 1
|
|
|
|
else:
|
|
properties:
|
|
clocks:
|
|
minItems: 6
|
|
|
|
clock-output-names:
|
|
minItems: 3
|
|
|
|
ports:
|
|
required:
|
|
- port@2
|
|
- port@3
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
|
|
#include <dt-bindings/clock/sun8i-r40-ccu.h>
|
|
#include <dt-bindings/reset/sun8i-r40-ccu.h>
|
|
|
|
tcon_top: tcon-top@1c70000 {
|
|
compatible = "allwinner,sun8i-r40-tcon-top";
|
|
reg = <0x01c70000 0x1000>;
|
|
clocks = <&ccu CLK_BUS_TCON_TOP>,
|
|
<&ccu CLK_TCON_TV0>,
|
|
<&ccu CLK_TVE0>,
|
|
<&ccu CLK_TCON_TV1>,
|
|
<&ccu CLK_TVE1>,
|
|
<&ccu CLK_DSI_DPHY>;
|
|
clock-names = "bus",
|
|
"tcon-tv0",
|
|
"tve0",
|
|
"tcon-tv1",
|
|
"tve1",
|
|
"dsi";
|
|
clock-output-names = "tcon-top-tv0",
|
|
"tcon-top-tv1",
|
|
"tcon-top-dsi";
|
|
resets = <&ccu RST_BUS_TCON_TOP>;
|
|
#clock-cells = <1>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
tcon_top_mixer0_in: port@0 {
|
|
reg = <0>;
|
|
|
|
tcon_top_mixer0_in_mixer0: endpoint {
|
|
remote-endpoint = <&mixer0_out_tcon_top>;
|
|
};
|
|
};
|
|
|
|
tcon_top_mixer0_out: port@1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <1>;
|
|
|
|
tcon_top_mixer0_out_tcon_lcd0: endpoint@0 {
|
|
reg = <0>;
|
|
};
|
|
|
|
tcon_top_mixer0_out_tcon_lcd1: endpoint@1 {
|
|
reg = <1>;
|
|
};
|
|
|
|
tcon_top_mixer0_out_tcon_tv0: endpoint@2 {
|
|
reg = <2>;
|
|
remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>;
|
|
};
|
|
|
|
tcon_top_mixer0_out_tcon_tv1: endpoint@3 {
|
|
reg = <3>;
|
|
remote-endpoint = <&tcon_tv1_in_tcon_top_mixer0>;
|
|
};
|
|
};
|
|
|
|
tcon_top_mixer1_in: port@2 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <2>;
|
|
|
|
tcon_top_mixer1_in_mixer1: endpoint@1 {
|
|
reg = <1>;
|
|
remote-endpoint = <&mixer1_out_tcon_top>;
|
|
};
|
|
};
|
|
|
|
tcon_top_mixer1_out: port@3 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <3>;
|
|
|
|
tcon_top_mixer1_out_tcon_lcd0: endpoint@0 {
|
|
reg = <0>;
|
|
};
|
|
|
|
tcon_top_mixer1_out_tcon_lcd1: endpoint@1 {
|
|
reg = <1>;
|
|
};
|
|
|
|
tcon_top_mixer1_out_tcon_tv0: endpoint@2 {
|
|
reg = <2>;
|
|
remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>;
|
|
};
|
|
|
|
tcon_top_mixer1_out_tcon_tv1: endpoint@3 {
|
|
reg = <3>;
|
|
remote-endpoint = <&tcon_tv1_in_tcon_top_mixer1>;
|
|
};
|
|
};
|
|
|
|
tcon_top_hdmi_in: port@4 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <4>;
|
|
|
|
tcon_top_hdmi_in_tcon_tv0: endpoint@0 {
|
|
reg = <0>;
|
|
remote-endpoint = <&tcon_tv0_out_tcon_top>;
|
|
};
|
|
|
|
tcon_top_hdmi_in_tcon_tv1: endpoint@1 {
|
|
reg = <1>;
|
|
remote-endpoint = <&tcon_tv1_out_tcon_top>;
|
|
};
|
|
};
|
|
|
|
tcon_top_hdmi_out: port@5 {
|
|
reg = <5>;
|
|
|
|
tcon_top_hdmi_out_hdmi: endpoint {
|
|
remote-endpoint = <&hdmi_in_tcon_top>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
...
|