162 lines
3.6 KiB
C
162 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Altera Arria10 DevKit System Resource MFD Driver
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*
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* Author: Thor Thayer <tthayer@opensource.altera.com>
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*
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* Copyright Intel Corporation (C) 2014-2016. All Rights Reserved
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*
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* SPI access for Altera Arria10 MAX5 System Resource Chip
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*
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* Adapted from DA9052
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*/
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#include <linux/mfd/altera-a10sr.h>
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#include <linux/mfd/core.h>
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#include <linux/init.h>
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#include <linux/of.h>
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#include <linux/spi/spi.h>
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static const struct mfd_cell altr_a10sr_subdev_info[] = {
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{
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.name = "altr_a10sr_gpio",
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.of_compatible = "altr,a10sr-gpio",
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},
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{
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.name = "altr_a10sr_reset",
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.of_compatible = "altr,a10sr-reset",
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},
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};
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static bool altr_a10sr_reg_readable(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case ALTR_A10SR_VERSION_READ:
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case ALTR_A10SR_LED_REG:
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case ALTR_A10SR_PBDSW_REG:
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case ALTR_A10SR_PBDSW_IRQ_REG:
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case ALTR_A10SR_PWR_GOOD1_REG:
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case ALTR_A10SR_PWR_GOOD2_REG:
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case ALTR_A10SR_PWR_GOOD3_REG:
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case ALTR_A10SR_FMCAB_REG:
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case ALTR_A10SR_HPS_RST_REG:
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case ALTR_A10SR_USB_QSPI_REG:
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case ALTR_A10SR_SFPA_REG:
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case ALTR_A10SR_SFPB_REG:
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case ALTR_A10SR_I2C_M_REG:
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case ALTR_A10SR_WARM_RST_REG:
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case ALTR_A10SR_WR_KEY_REG:
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case ALTR_A10SR_PMBUS_REG:
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return true;
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default:
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return false;
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}
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}
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static bool altr_a10sr_reg_writeable(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case ALTR_A10SR_LED_REG:
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case ALTR_A10SR_PBDSW_IRQ_REG:
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case ALTR_A10SR_FMCAB_REG:
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case ALTR_A10SR_HPS_RST_REG:
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case ALTR_A10SR_USB_QSPI_REG:
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case ALTR_A10SR_SFPA_REG:
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case ALTR_A10SR_SFPB_REG:
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case ALTR_A10SR_WARM_RST_REG:
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case ALTR_A10SR_WR_KEY_REG:
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case ALTR_A10SR_PMBUS_REG:
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return true;
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default:
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return false;
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}
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}
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static bool altr_a10sr_reg_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case ALTR_A10SR_PBDSW_REG:
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case ALTR_A10SR_PBDSW_IRQ_REG:
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case ALTR_A10SR_PWR_GOOD1_REG:
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case ALTR_A10SR_PWR_GOOD2_REG:
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case ALTR_A10SR_PWR_GOOD3_REG:
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case ALTR_A10SR_HPS_RST_REG:
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case ALTR_A10SR_I2C_M_REG:
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case ALTR_A10SR_WARM_RST_REG:
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case ALTR_A10SR_WR_KEY_REG:
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case ALTR_A10SR_PMBUS_REG:
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_config altr_a10sr_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.cache_type = REGCACHE_NONE,
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.use_single_read = true,
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.use_single_write = true,
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.read_flag_mask = 1,
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.write_flag_mask = 0,
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.max_register = ALTR_A10SR_WR_KEY_REG,
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.readable_reg = altr_a10sr_reg_readable,
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.writeable_reg = altr_a10sr_reg_writeable,
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.volatile_reg = altr_a10sr_reg_volatile,
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};
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static int altr_a10sr_spi_probe(struct spi_device *spi)
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{
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int ret;
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struct altr_a10sr *a10sr;
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a10sr = devm_kzalloc(&spi->dev, sizeof(*a10sr),
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GFP_KERNEL);
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if (!a10sr)
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return -ENOMEM;
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spi->mode = SPI_MODE_3;
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spi->bits_per_word = 8;
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spi_setup(spi);
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a10sr->dev = &spi->dev;
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spi_set_drvdata(spi, a10sr);
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a10sr->regmap = devm_regmap_init_spi(spi, &altr_a10sr_regmap_config);
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if (IS_ERR(a10sr->regmap)) {
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ret = PTR_ERR(a10sr->regmap);
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dev_err(&spi->dev, "Failed to allocate register map: %d\n",
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ret);
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return ret;
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}
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ret = devm_mfd_add_devices(a10sr->dev, PLATFORM_DEVID_AUTO,
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altr_a10sr_subdev_info,
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ARRAY_SIZE(altr_a10sr_subdev_info),
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NULL, 0, NULL);
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if (ret)
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dev_err(a10sr->dev, "Failed to register sub-devices: %d\n",
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ret);
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return ret;
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}
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static const struct of_device_id altr_a10sr_spi_of_match[] = {
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{ .compatible = "altr,a10sr" },
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{ },
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};
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static struct spi_driver altr_a10sr_spi_driver = {
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.probe = altr_a10sr_spi_probe,
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.driver = {
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.name = "altr_a10sr",
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.of_match_table = of_match_ptr(altr_a10sr_spi_of_match),
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},
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};
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builtin_driver(altr_a10sr_spi_driver, spi_register_driver)
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