278 lines
7.7 KiB
C
278 lines
7.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 Spreadtrum Communications Inc.
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* Copyright (C) 2018 Linaro Ltd.
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*/
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#include <linux/bitops.h>
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#include <linux/gpio/driver.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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/* GPIO registers definition */
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#define SPRD_GPIO_DATA 0x0
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#define SPRD_GPIO_DMSK 0x4
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#define SPRD_GPIO_DIR 0x8
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#define SPRD_GPIO_IS 0xc
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#define SPRD_GPIO_IBE 0x10
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#define SPRD_GPIO_IEV 0x14
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#define SPRD_GPIO_IE 0x18
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#define SPRD_GPIO_RIS 0x1c
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#define SPRD_GPIO_MIS 0x20
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#define SPRD_GPIO_IC 0x24
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#define SPRD_GPIO_INEN 0x28
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/* We have 16 banks GPIOs and each bank contain 16 GPIOs */
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#define SPRD_GPIO_BANK_NR 16
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#define SPRD_GPIO_NR 256
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#define SPRD_GPIO_BANK_SIZE 0x80
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#define SPRD_GPIO_BANK_MASK GENMASK(15, 0)
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#define SPRD_GPIO_BIT(x) ((x) & (SPRD_GPIO_BANK_NR - 1))
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struct sprd_gpio {
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struct gpio_chip chip;
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void __iomem *base;
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spinlock_t lock;
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int irq;
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};
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static inline void __iomem *sprd_gpio_bank_base(struct sprd_gpio *sprd_gpio,
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unsigned int bank)
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{
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return sprd_gpio->base + SPRD_GPIO_BANK_SIZE * bank;
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}
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static void sprd_gpio_update(struct gpio_chip *chip, unsigned int offset,
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u16 reg, int val)
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{
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struct sprd_gpio *sprd_gpio = gpiochip_get_data(chip);
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void __iomem *base = sprd_gpio_bank_base(sprd_gpio,
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offset / SPRD_GPIO_BANK_NR);
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unsigned long flags;
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u32 tmp;
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spin_lock_irqsave(&sprd_gpio->lock, flags);
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tmp = readl_relaxed(base + reg);
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if (val)
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tmp |= BIT(SPRD_GPIO_BIT(offset));
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else
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tmp &= ~BIT(SPRD_GPIO_BIT(offset));
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writel_relaxed(tmp, base + reg);
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spin_unlock_irqrestore(&sprd_gpio->lock, flags);
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}
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static int sprd_gpio_read(struct gpio_chip *chip, unsigned int offset, u16 reg)
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{
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struct sprd_gpio *sprd_gpio = gpiochip_get_data(chip);
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void __iomem *base = sprd_gpio_bank_base(sprd_gpio,
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offset / SPRD_GPIO_BANK_NR);
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return !!(readl_relaxed(base + reg) & BIT(SPRD_GPIO_BIT(offset)));
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}
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static int sprd_gpio_request(struct gpio_chip *chip, unsigned int offset)
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{
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sprd_gpio_update(chip, offset, SPRD_GPIO_DMSK, 1);
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return 0;
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}
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static void sprd_gpio_free(struct gpio_chip *chip, unsigned int offset)
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{
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sprd_gpio_update(chip, offset, SPRD_GPIO_DMSK, 0);
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}
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static int sprd_gpio_direction_input(struct gpio_chip *chip,
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unsigned int offset)
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{
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sprd_gpio_update(chip, offset, SPRD_GPIO_DIR, 0);
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sprd_gpio_update(chip, offset, SPRD_GPIO_INEN, 1);
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return 0;
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}
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static int sprd_gpio_direction_output(struct gpio_chip *chip,
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unsigned int offset, int value)
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{
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sprd_gpio_update(chip, offset, SPRD_GPIO_DIR, 1);
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sprd_gpio_update(chip, offset, SPRD_GPIO_INEN, 0);
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sprd_gpio_update(chip, offset, SPRD_GPIO_DATA, value);
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return 0;
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}
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static int sprd_gpio_get(struct gpio_chip *chip, unsigned int offset)
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{
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return sprd_gpio_read(chip, offset, SPRD_GPIO_DATA);
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}
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static void sprd_gpio_set(struct gpio_chip *chip, unsigned int offset,
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int value)
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{
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sprd_gpio_update(chip, offset, SPRD_GPIO_DATA, value);
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}
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static void sprd_gpio_irq_mask(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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u32 offset = irqd_to_hwirq(data);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IE, 0);
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}
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static void sprd_gpio_irq_ack(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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u32 offset = irqd_to_hwirq(data);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
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}
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static void sprd_gpio_irq_unmask(struct irq_data *data)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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u32 offset = irqd_to_hwirq(data);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IE, 1);
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}
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static int sprd_gpio_irq_set_type(struct irq_data *data,
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unsigned int flow_type)
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{
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struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
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u32 offset = irqd_to_hwirq(data);
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switch (flow_type) {
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case IRQ_TYPE_EDGE_RISING:
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sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 1);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
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irq_set_handler_locked(data, handle_edge_irq);
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break;
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case IRQ_TYPE_EDGE_FALLING:
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sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 0);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
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irq_set_handler_locked(data, handle_edge_irq);
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break;
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case IRQ_TYPE_EDGE_BOTH:
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sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 0);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 1);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IC, 1);
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irq_set_handler_locked(data, handle_edge_irq);
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break;
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case IRQ_TYPE_LEVEL_HIGH:
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sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 1);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 1);
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irq_set_handler_locked(data, handle_level_irq);
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break;
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case IRQ_TYPE_LEVEL_LOW:
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sprd_gpio_update(chip, offset, SPRD_GPIO_IS, 1);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IBE, 0);
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sprd_gpio_update(chip, offset, SPRD_GPIO_IEV, 0);
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irq_set_handler_locked(data, handle_level_irq);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static void sprd_gpio_irq_handler(struct irq_desc *desc)
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{
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struct gpio_chip *chip = irq_desc_get_handler_data(desc);
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struct irq_chip *ic = irq_desc_get_chip(desc);
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struct sprd_gpio *sprd_gpio = gpiochip_get_data(chip);
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u32 bank, n;
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chained_irq_enter(ic, desc);
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for (bank = 0; bank * SPRD_GPIO_BANK_NR < chip->ngpio; bank++) {
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void __iomem *base = sprd_gpio_bank_base(sprd_gpio, bank);
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unsigned long reg = readl_relaxed(base + SPRD_GPIO_MIS) &
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SPRD_GPIO_BANK_MASK;
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for_each_set_bit(n, ®, SPRD_GPIO_BANK_NR)
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generic_handle_domain_irq(chip->irq.domain,
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bank * SPRD_GPIO_BANK_NR + n);
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}
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chained_irq_exit(ic, desc);
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}
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static struct irq_chip sprd_gpio_irqchip = {
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.name = "sprd-gpio",
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.irq_ack = sprd_gpio_irq_ack,
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.irq_mask = sprd_gpio_irq_mask,
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.irq_unmask = sprd_gpio_irq_unmask,
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.irq_set_type = sprd_gpio_irq_set_type,
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.flags = IRQCHIP_SKIP_SET_WAKE,
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};
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static int sprd_gpio_probe(struct platform_device *pdev)
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{
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struct gpio_irq_chip *irq;
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struct sprd_gpio *sprd_gpio;
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sprd_gpio = devm_kzalloc(&pdev->dev, sizeof(*sprd_gpio), GFP_KERNEL);
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if (!sprd_gpio)
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return -ENOMEM;
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sprd_gpio->irq = platform_get_irq(pdev, 0);
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if (sprd_gpio->irq < 0)
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return sprd_gpio->irq;
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sprd_gpio->base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(sprd_gpio->base))
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return PTR_ERR(sprd_gpio->base);
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spin_lock_init(&sprd_gpio->lock);
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sprd_gpio->chip.label = dev_name(&pdev->dev);
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sprd_gpio->chip.ngpio = SPRD_GPIO_NR;
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sprd_gpio->chip.base = -1;
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sprd_gpio->chip.parent = &pdev->dev;
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sprd_gpio->chip.of_node = pdev->dev.of_node;
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sprd_gpio->chip.request = sprd_gpio_request;
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sprd_gpio->chip.free = sprd_gpio_free;
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sprd_gpio->chip.get = sprd_gpio_get;
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sprd_gpio->chip.set = sprd_gpio_set;
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sprd_gpio->chip.direction_input = sprd_gpio_direction_input;
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sprd_gpio->chip.direction_output = sprd_gpio_direction_output;
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irq = &sprd_gpio->chip.irq;
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irq->chip = &sprd_gpio_irqchip;
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irq->handler = handle_bad_irq;
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irq->default_type = IRQ_TYPE_NONE;
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irq->parent_handler = sprd_gpio_irq_handler;
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irq->parent_handler_data = sprd_gpio;
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irq->num_parents = 1;
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irq->parents = &sprd_gpio->irq;
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return devm_gpiochip_add_data(&pdev->dev, &sprd_gpio->chip, sprd_gpio);
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}
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static const struct of_device_id sprd_gpio_of_match[] = {
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{ .compatible = "sprd,sc9860-gpio", },
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{ /* end of list */ }
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};
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MODULE_DEVICE_TABLE(of, sprd_gpio_of_match);
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static struct platform_driver sprd_gpio_driver = {
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.probe = sprd_gpio_probe,
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.driver = {
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.name = "sprd-gpio",
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.of_match_table = sprd_gpio_of_match,
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},
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};
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module_platform_driver_probe(sprd_gpio_driver, sprd_gpio_probe);
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MODULE_DESCRIPTION("Spreadtrum GPIO driver");
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MODULE_LICENSE("GPL v2");
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