385 lines
9.6 KiB
C
385 lines
9.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Raspberry Pi driver for firmware controlled clocks
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*
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* Even though clk-bcm2835 provides an interface to the hardware registers for
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* the system clocks we've had to factor out 'pllb' as the firmware 'owns' it.
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* We're not allowed to change it directly as we might race with the
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* over-temperature and under-voltage protections provided by the firmware.
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*
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* Copyright (C) 2019 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
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*/
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#include <linux/clkdev.h>
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <soc/bcm2835/raspberrypi-firmware.h>
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enum rpi_firmware_clk_id {
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RPI_FIRMWARE_EMMC_CLK_ID = 1,
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RPI_FIRMWARE_UART_CLK_ID,
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RPI_FIRMWARE_ARM_CLK_ID,
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RPI_FIRMWARE_CORE_CLK_ID,
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RPI_FIRMWARE_V3D_CLK_ID,
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RPI_FIRMWARE_H264_CLK_ID,
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RPI_FIRMWARE_ISP_CLK_ID,
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RPI_FIRMWARE_SDRAM_CLK_ID,
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RPI_FIRMWARE_PIXEL_CLK_ID,
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RPI_FIRMWARE_PWM_CLK_ID,
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RPI_FIRMWARE_HEVC_CLK_ID,
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RPI_FIRMWARE_EMMC2_CLK_ID,
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RPI_FIRMWARE_M2MC_CLK_ID,
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RPI_FIRMWARE_PIXEL_BVB_CLK_ID,
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RPI_FIRMWARE_NUM_CLK_ID,
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};
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static char *rpi_firmware_clk_names[] = {
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[RPI_FIRMWARE_EMMC_CLK_ID] = "emmc",
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[RPI_FIRMWARE_UART_CLK_ID] = "uart",
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[RPI_FIRMWARE_ARM_CLK_ID] = "arm",
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[RPI_FIRMWARE_CORE_CLK_ID] = "core",
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[RPI_FIRMWARE_V3D_CLK_ID] = "v3d",
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[RPI_FIRMWARE_H264_CLK_ID] = "h264",
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[RPI_FIRMWARE_ISP_CLK_ID] = "isp",
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[RPI_FIRMWARE_SDRAM_CLK_ID] = "sdram",
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[RPI_FIRMWARE_PIXEL_CLK_ID] = "pixel",
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[RPI_FIRMWARE_PWM_CLK_ID] = "pwm",
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[RPI_FIRMWARE_HEVC_CLK_ID] = "hevc",
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[RPI_FIRMWARE_EMMC2_CLK_ID] = "emmc2",
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[RPI_FIRMWARE_M2MC_CLK_ID] = "m2mc",
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[RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = "pixel-bvb",
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};
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#define RPI_FIRMWARE_STATE_ENABLE_BIT BIT(0)
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#define RPI_FIRMWARE_STATE_WAIT_BIT BIT(1)
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struct raspberrypi_clk {
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struct device *dev;
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struct rpi_firmware *firmware;
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struct platform_device *cpufreq;
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};
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struct raspberrypi_clk_data {
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struct clk_hw hw;
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unsigned int id;
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struct raspberrypi_clk *rpi;
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};
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/*
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* Structure of the message passed to Raspberry Pi's firmware in order to
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* change clock rates. The 'disable_turbo' option is only available to the ARM
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* clock (pllb) which we enable by default as turbo mode will alter multiple
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* clocks at once.
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*
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* Even though we're able to access the clock registers directly we're bound to
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* use the firmware interface as the firmware ultimately takes care of
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* mitigating overheating/undervoltage situations and we would be changing
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* frequencies behind his back.
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*
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* For more information on the firmware interface check:
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* https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
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*/
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struct raspberrypi_firmware_prop {
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__le32 id;
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__le32 val;
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__le32 disable_turbo;
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} __packed;
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static int raspberrypi_clock_property(struct rpi_firmware *firmware,
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const struct raspberrypi_clk_data *data,
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u32 tag, u32 *val)
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{
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struct raspberrypi_firmware_prop msg = {
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.id = cpu_to_le32(data->id),
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.val = cpu_to_le32(*val),
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.disable_turbo = cpu_to_le32(1),
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};
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int ret;
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ret = rpi_firmware_property(firmware, tag, &msg, sizeof(msg));
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if (ret)
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return ret;
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*val = le32_to_cpu(msg.val);
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return 0;
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}
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static int raspberrypi_fw_is_prepared(struct clk_hw *hw)
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{
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struct raspberrypi_clk_data *data =
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container_of(hw, struct raspberrypi_clk_data, hw);
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struct raspberrypi_clk *rpi = data->rpi;
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u32 val = 0;
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int ret;
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ret = raspberrypi_clock_property(rpi->firmware, data,
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RPI_FIRMWARE_GET_CLOCK_STATE, &val);
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if (ret)
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return 0;
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return !!(val & RPI_FIRMWARE_STATE_ENABLE_BIT);
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}
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static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct raspberrypi_clk_data *data =
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container_of(hw, struct raspberrypi_clk_data, hw);
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struct raspberrypi_clk *rpi = data->rpi;
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u32 val = 0;
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int ret;
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ret = raspberrypi_clock_property(rpi->firmware, data,
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RPI_FIRMWARE_GET_CLOCK_RATE, &val);
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if (ret)
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return 0;
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return val;
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}
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static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct raspberrypi_clk_data *data =
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container_of(hw, struct raspberrypi_clk_data, hw);
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struct raspberrypi_clk *rpi = data->rpi;
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u32 _rate = rate;
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int ret;
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ret = raspberrypi_clock_property(rpi->firmware, data,
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RPI_FIRMWARE_SET_CLOCK_RATE, &_rate);
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if (ret)
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dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d\n",
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clk_hw_get_name(hw), ret);
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return ret;
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}
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static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *req)
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{
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/*
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* The firmware will do the rounding but that isn't part of
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* the interface with the firmware, so we just do our best
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* here.
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*/
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req->rate = clamp(req->rate, req->min_rate, req->max_rate);
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return 0;
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}
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static const struct clk_ops raspberrypi_firmware_clk_ops = {
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.is_prepared = raspberrypi_fw_is_prepared,
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.recalc_rate = raspberrypi_fw_get_rate,
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.determine_rate = raspberrypi_fw_dumb_determine_rate,
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.set_rate = raspberrypi_fw_set_rate,
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};
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static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
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unsigned int parent,
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unsigned int id)
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{
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struct raspberrypi_clk_data *data;
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struct clk_init_data init = {};
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u32 min_rate, max_rate;
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int ret;
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data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return ERR_PTR(-ENOMEM);
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data->rpi = rpi;
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data->id = id;
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init.name = devm_kasprintf(rpi->dev, GFP_KERNEL,
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"fw-clk-%s",
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rpi_firmware_clk_names[id]);
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init.ops = &raspberrypi_firmware_clk_ops;
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init.flags = CLK_GET_RATE_NOCACHE;
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data->hw.init = &init;
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ret = raspberrypi_clock_property(rpi->firmware, data,
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RPI_FIRMWARE_GET_MIN_CLOCK_RATE,
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&min_rate);
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if (ret) {
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dev_err(rpi->dev, "Failed to get clock %d min freq: %d\n",
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id, ret);
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return ERR_PTR(ret);
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}
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ret = raspberrypi_clock_property(rpi->firmware, data,
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RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
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&max_rate);
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if (ret) {
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dev_err(rpi->dev, "Failed to get clock %d max freq: %d\n",
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id, ret);
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return ERR_PTR(ret);
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}
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ret = devm_clk_hw_register(rpi->dev, &data->hw);
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if (ret)
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return ERR_PTR(ret);
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clk_hw_set_rate_range(&data->hw, min_rate, max_rate);
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if (id == RPI_FIRMWARE_ARM_CLK_ID) {
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ret = devm_clk_hw_register_clkdev(rpi->dev, &data->hw,
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NULL, "cpu0");
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if (ret) {
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dev_err(rpi->dev, "Failed to initialize clkdev\n");
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return ERR_PTR(ret);
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}
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}
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return &data->hw;
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}
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struct rpi_firmware_get_clocks_response {
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u32 parent;
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u32 id;
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};
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static int raspberrypi_discover_clocks(struct raspberrypi_clk *rpi,
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struct clk_hw_onecell_data *data)
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{
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struct rpi_firmware_get_clocks_response *clks;
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int ret;
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/*
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* The firmware doesn't guarantee that the last element of
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* RPI_FIRMWARE_GET_CLOCKS is zeroed. So allocate an additional
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* zero element as sentinel.
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*/
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clks = devm_kcalloc(rpi->dev,
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RPI_FIRMWARE_NUM_CLK_ID + 1, sizeof(*clks),
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GFP_KERNEL);
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if (!clks)
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return -ENOMEM;
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ret = rpi_firmware_property(rpi->firmware, RPI_FIRMWARE_GET_CLOCKS,
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clks,
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sizeof(*clks) * RPI_FIRMWARE_NUM_CLK_ID);
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if (ret)
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return ret;
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while (clks->id) {
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struct clk_hw *hw;
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switch (clks->id) {
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case RPI_FIRMWARE_ARM_CLK_ID:
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case RPI_FIRMWARE_CORE_CLK_ID:
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case RPI_FIRMWARE_M2MC_CLK_ID:
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case RPI_FIRMWARE_V3D_CLK_ID:
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case RPI_FIRMWARE_PIXEL_BVB_CLK_ID:
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hw = raspberrypi_clk_register(rpi, clks->parent,
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clks->id);
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if (IS_ERR(hw))
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return PTR_ERR(hw);
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data->hws[clks->id] = hw;
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data->num = clks->id + 1;
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fallthrough;
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default:
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clks++;
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break;
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}
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}
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return 0;
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}
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static int raspberrypi_clk_probe(struct platform_device *pdev)
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{
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struct clk_hw_onecell_data *clk_data;
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struct device_node *firmware_node;
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struct device *dev = &pdev->dev;
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struct rpi_firmware *firmware;
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struct raspberrypi_clk *rpi;
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int ret;
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/*
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* We can be probed either through the an old-fashioned
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* platform device registration or through a DT node that is a
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* child of the firmware node. Handle both cases.
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*/
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if (dev->of_node)
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firmware_node = of_get_parent(dev->of_node);
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else
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firmware_node = of_find_compatible_node(NULL, NULL,
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"raspberrypi,bcm2835-firmware");
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if (!firmware_node) {
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dev_err(dev, "Missing firmware node\n");
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return -ENOENT;
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}
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firmware = devm_rpi_firmware_get(&pdev->dev, firmware_node);
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of_node_put(firmware_node);
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if (!firmware)
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return -EPROBE_DEFER;
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rpi = devm_kzalloc(dev, sizeof(*rpi), GFP_KERNEL);
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if (!rpi)
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return -ENOMEM;
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rpi->dev = dev;
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rpi->firmware = firmware;
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platform_set_drvdata(pdev, rpi);
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clk_data = devm_kzalloc(dev, struct_size(clk_data, hws,
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RPI_FIRMWARE_NUM_CLK_ID),
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GFP_KERNEL);
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if (!clk_data)
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return -ENOMEM;
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ret = raspberrypi_discover_clocks(rpi, clk_data);
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if (ret)
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return ret;
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ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
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clk_data);
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if (ret)
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return ret;
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rpi->cpufreq = platform_device_register_data(dev, "raspberrypi-cpufreq",
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-1, NULL, 0);
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return 0;
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}
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static int raspberrypi_clk_remove(struct platform_device *pdev)
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{
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struct raspberrypi_clk *rpi = platform_get_drvdata(pdev);
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platform_device_unregister(rpi->cpufreq);
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return 0;
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}
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static const struct of_device_id raspberrypi_clk_match[] = {
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{ .compatible = "raspberrypi,firmware-clocks" },
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{ },
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};
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MODULE_DEVICE_TABLE(of, raspberrypi_clk_match);
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static struct platform_driver raspberrypi_clk_driver = {
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.driver = {
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.name = "raspberrypi-clk",
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.of_match_table = raspberrypi_clk_match,
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},
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.probe = raspberrypi_clk_probe,
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.remove = raspberrypi_clk_remove,
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};
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module_platform_driver(raspberrypi_clk_driver);
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MODULE_AUTHOR("Nicolas Saenz Julienne <nsaenzjulienne@suse.de>");
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MODULE_DESCRIPTION("Raspberry Pi firmware clock driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:raspberrypi-clk");
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