253 lines
8.0 KiB
C
253 lines
8.0 KiB
C
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/*
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* Copyright 2018 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "head.h"
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#include "atom.h"
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#include "core.h"
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#include <nvif/pushc37b.h>
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#include <nvhw/class/clc57d.h>
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static int
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headc57d_or(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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u8 depth;
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int ret;
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/*XXX: This is a dirty hack until OR depth handling is
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* improved later for deep colour etc.
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*/
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switch (asyh->or.depth) {
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case 6: depth = 5; break;
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case 5: depth = 4; break;
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case 2: depth = 1; break;
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case 0: depth = 4; break;
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default:
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depth = asyh->or.depth;
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WARN_ON(1);
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break;
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}
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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PUSH_MTHD(push, NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE(i),
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NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) |
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NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) |
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NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) |
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NVVAL(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, depth) |
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NVDEF(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, COLOR_SPACE_OVERRIDE, DISABLE) |
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NVDEF(NVC57D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, EXT_PACKET_WIN, NONE));
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return 0;
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}
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static int
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headc57d_procamp(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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//TODO:
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PUSH_MTHD(push, NVC57D, HEAD_SET_PROCAMP(i),
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NVDEF(NVC57D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) |
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NVDEF(NVC57D, HEAD_SET_PROCAMP, CHROMA_LPF, DISABLE) |
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NVDEF(NVC57D, HEAD_SET_PROCAMP, DYNAMIC_RANGE, VESA));
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return 0;
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}
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static int
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headc57d_olut_clr(struct nv50_head *head)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 2)))
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return ret;
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PUSH_MTHD(push, NVC57D, HEAD_SET_CONTEXT_DMA_OLUT(i), 0x00000000);
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return 0;
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}
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static int
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headc57d_olut_set(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 5)))
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return ret;
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PUSH_MTHD(push, NVC57D, HEAD_SET_OLUT_CONTROL(i),
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NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, INTERPOLATE, asyh->olut.output_mode) |
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NVDEF(NVC57D, HEAD_SET_OLUT_CONTROL, MIRROR, DISABLE) |
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NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, MODE, asyh->olut.mode) |
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NVVAL(NVC57D, HEAD_SET_OLUT_CONTROL, SIZE, asyh->olut.size),
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HEAD_SET_OLUT_FP_NORM_SCALE(i), 0xffffffff,
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HEAD_SET_CONTEXT_DMA_OLUT(i), asyh->olut.handle,
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HEAD_SET_OFFSET_OLUT(i), asyh->olut.offset >> 8);
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return 0;
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}
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static void
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headc57d_olut_load_8(struct drm_color_lut *in, int size, void __iomem *mem)
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{
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memset_io(mem, 0x00, 0x20); /* VSS header. */
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mem += 0x20;
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while (size--) {
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u16 r = drm_color_lut_extract(in-> red + 0, 16);
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u16 g = drm_color_lut_extract(in->green + 0, 16);
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u16 b = drm_color_lut_extract(in-> blue + 0, 16);
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u16 ri = 0, gi = 0, bi = 0, i;
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if (in++, size) {
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ri = (drm_color_lut_extract(in-> red, 16) - r) / 4;
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gi = (drm_color_lut_extract(in->green, 16) - g) / 4;
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bi = (drm_color_lut_extract(in-> blue, 16) - b) / 4;
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}
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for (i = 0; i < 4; i++, mem += 8) {
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writew(r + ri * i, mem + 0);
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writew(g + gi * i, mem + 2);
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writew(b + bi * i, mem + 4);
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}
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}
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/* INTERPOLATE modes require a "next" entry to interpolate with,
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* so we replicate the last entry to deal with this for now.
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*/
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writew(readw(mem - 8), mem + 0);
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writew(readw(mem - 6), mem + 2);
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writew(readw(mem - 4), mem + 4);
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}
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static void
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headc57d_olut_load(struct drm_color_lut *in, int size, void __iomem *mem)
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{
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memset_io(mem, 0x00, 0x20); /* VSS header. */
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mem += 0x20;
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for (; size--; in++, mem += 0x08) {
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writew(drm_color_lut_extract(in-> red, 16), mem + 0);
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writew(drm_color_lut_extract(in->green, 16), mem + 2);
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writew(drm_color_lut_extract(in-> blue, 16), mem + 4);
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}
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/* INTERPOLATE modes require a "next" entry to interpolate with,
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* so we replicate the last entry to deal with this for now.
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*/
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writew(readw(mem - 8), mem + 0);
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writew(readw(mem - 6), mem + 2);
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writew(readw(mem - 4), mem + 4);
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}
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bool
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headc57d_olut(struct nv50_head *head, struct nv50_head_atom *asyh, int size)
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{
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if (size != 0 && size != 256 && size != 1024)
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return false;
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asyh->olut.mode = NVC57D_HEAD_SET_OLUT_CONTROL_MODE_DIRECT10;
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asyh->olut.size = 4 /* VSS header. */ + 1024 + 1 /* Entries. */;
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asyh->olut.output_mode = NVC57D_HEAD_SET_OLUT_CONTROL_INTERPOLATE_ENABLE;
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if (size == 256)
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asyh->olut.load = headc57d_olut_load_8;
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else
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asyh->olut.load = headc57d_olut_load;
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return true;
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}
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static int
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headc57d_mode(struct nv50_head *head, struct nv50_head_atom *asyh)
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{
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struct nvif_push *push = nv50_disp(head->base.base.dev)->core->chan.push;
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struct nv50_head_mode *m = &asyh->mode;
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const int i = head->base.index;
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int ret;
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if ((ret = PUSH_WAIT(push, 15)))
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return ret;
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PUSH_MTHD(push, NVC57D, HEAD_SET_RASTER_SIZE(i),
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NVVAL(NVC57D, HEAD_SET_RASTER_SIZE, WIDTH, m->h.active) |
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NVVAL(NVC57D, HEAD_SET_RASTER_SIZE, HEIGHT, m->v.active),
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HEAD_SET_RASTER_SYNC_END(i),
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NVVAL(NVC57D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) |
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NVVAL(NVC57D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce),
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HEAD_SET_RASTER_BLANK_END(i),
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NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_END, X, m->h.blanke) |
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NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_END, Y, m->v.blanke),
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HEAD_SET_RASTER_BLANK_START(i),
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NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_START, X, m->h.blanks) |
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NVVAL(NVC57D, HEAD_SET_RASTER_BLANK_START, Y, m->v.blanks));
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//XXX:
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PUSH_NVSQ(push, NVC57D, 0x2074 + (i * 0x400), m->v.blank2e << 16 | m->v.blank2s);
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PUSH_NVSQ(push, NVC57D, 0x2008 + (i * 0x400), m->interlace);
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PUSH_MTHD(push, NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY(i),
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NVVAL(NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY, HERTZ, m->clock * 1000));
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PUSH_MTHD(push, NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX(i),
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NVVAL(NVC57D, HEAD_SET_PIXEL_CLOCK_FREQUENCY_MAX, HERTZ, m->clock * 1000));
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/*XXX: HEAD_USAGE_BOUNDS, doesn't belong here. */
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PUSH_MTHD(push, NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS(i),
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NVDEF(NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS, CURSOR, USAGE_W256_H256) |
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NVDEF(NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS, OLUT_ALLOWED, TRUE) |
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NVDEF(NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS, OUTPUT_SCALER_TAPS, TAPS_2) |
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NVDEF(NVC57D, HEAD_SET_HEAD_USAGE_BOUNDS, UPSCALING_ALLOWED, TRUE));
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return 0;
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}
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const struct nv50_head_func
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headc57d = {
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.view = headc37d_view,
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.mode = headc57d_mode,
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.olut = headc57d_olut,
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.olut_identity = true,
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.olut_size = 1024,
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.olut_set = headc57d_olut_set,
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.olut_clr = headc57d_olut_clr,
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.curs_layout = head917d_curs_layout,
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.curs_format = headc37d_curs_format,
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.curs_set = headc37d_curs_set,
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.curs_clr = headc37d_curs_clr,
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.dither = headc37d_dither,
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.procamp = headc57d_procamp,
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.or = headc57d_or,
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/* TODO: flexible window mappings */
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.static_wndw_map = headc37d_static_wndw_map,
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};
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