103 lines
4.1 KiB
C
103 lines
4.1 KiB
C
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/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
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/* Copyright(c) 2015 - 2020 Intel Corporation */
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#ifndef ADF_PF2VF_MSG_H
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#define ADF_PF2VF_MSG_H
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/*
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* PF<->VF Messaging
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* The PF has an array of 32-bit PF2VF registers, one for each VF. The
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* PF can access all these registers; each VF can access only the one
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* register associated with that particular VF.
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*
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* The register functionally is split into two parts:
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* The bottom half is for PF->VF messages. In particular when the first
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* bit of this register (bit 0) gets set an interrupt will be triggered
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* in the respective VF.
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* The top half is for VF->PF messages. In particular when the first bit
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* of this half of register (bit 16) gets set an interrupt will be triggered
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* in the PF.
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*
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* The remaining bits within this register are available to encode messages.
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* and implement a collision control mechanism to prevent concurrent use of
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* the PF2VF register by both the PF and VF.
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*
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* 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
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* _______________________________________________
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* | | | | | | | | | | | | | | | | |
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* +-----------------------------------------------+
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* \___________________________/ \_________/ ^ ^
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* ^ ^ | |
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* | | | VF2PF Int
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* | | Message Origin
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* | Message Type
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* Message-specific Data/Reserved
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*
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* 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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* _______________________________________________
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* | | | | | | | | | | | | | | | | |
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* +-----------------------------------------------+
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* \___________________________/ \_________/ ^ ^
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* ^ ^ | |
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* | | | PF2VF Int
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* | | Message Origin
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* | Message Type
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* Message-specific Data/Reserved
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*
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* Message Origin (Should always be 1)
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* A legacy out-of-tree QAT driver allowed for a set of messages not supported
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* by this driver; these had a Msg Origin of 0 and are ignored by this driver.
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*
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* When a PF or VF attempts to send a message in the lower or upper 16 bits,
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* respectively, the other 16 bits are written to first with a defined
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* IN_USE_BY pattern as part of a collision control scheme (see adf_iov_putmsg).
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*/
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#define ADF_PFVF_COMPAT_THIS_VERSION 0x1 /* PF<->VF compat */
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/* PF->VF messages */
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#define ADF_PF2VF_INT BIT(0)
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#define ADF_PF2VF_MSGORIGIN_SYSTEM BIT(1)
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#define ADF_PF2VF_MSGTYPE_MASK 0x0000003C
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#define ADF_PF2VF_MSGTYPE_SHIFT 2
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#define ADF_PF2VF_MSGTYPE_RESTARTING 0x01
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#define ADF_PF2VF_MSGTYPE_VERSION_RESP 0x02
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#define ADF_PF2VF_IN_USE_BY_PF 0x6AC20000
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#define ADF_PF2VF_IN_USE_BY_PF_MASK 0xFFFE0000
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/* PF->VF Version Response */
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#define ADF_PF2VF_VERSION_RESP_VERS_MASK 0x00003FC0
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#define ADF_PF2VF_VERSION_RESP_VERS_SHIFT 6
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#define ADF_PF2VF_VERSION_RESP_RESULT_MASK 0x0000C000
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#define ADF_PF2VF_VERSION_RESP_RESULT_SHIFT 14
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#define ADF_PF2VF_MINORVERSION_SHIFT 6
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#define ADF_PF2VF_MAJORVERSION_SHIFT 10
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#define ADF_PF2VF_VF_COMPATIBLE 1
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#define ADF_PF2VF_VF_INCOMPATIBLE 2
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#define ADF_PF2VF_VF_COMPAT_UNKNOWN 3
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/* VF->PF messages */
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#define ADF_VF2PF_IN_USE_BY_VF 0x00006AC2
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#define ADF_VF2PF_IN_USE_BY_VF_MASK 0x0000FFFE
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#define ADF_VF2PF_INT BIT(16)
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#define ADF_VF2PF_MSGORIGIN_SYSTEM BIT(17)
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#define ADF_VF2PF_MSGTYPE_MASK 0x003C0000
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#define ADF_VF2PF_MSGTYPE_SHIFT 18
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#define ADF_VF2PF_MSGTYPE_INIT 0x3
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#define ADF_VF2PF_MSGTYPE_SHUTDOWN 0x4
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#define ADF_VF2PF_MSGTYPE_VERSION_REQ 0x5
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#define ADF_VF2PF_MSGTYPE_COMPAT_VER_REQ 0x6
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/* VF->PF Compatible Version Request */
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#define ADF_VF2PF_COMPAT_VER_REQ_SHIFT 22
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/* Collision detection */
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#define ADF_IOV_MSG_COLLISION_DETECT_DELAY 10
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#define ADF_IOV_MSG_ACK_DELAY 2
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#define ADF_IOV_MSG_ACK_MAX_RETRY 100
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#define ADF_IOV_MSG_RETRY_DELAY 5
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#define ADF_IOV_MSG_MAX_RETRIES 3
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#define ADF_IOV_MSG_RESP_TIMEOUT (ADF_IOV_MSG_ACK_DELAY * \
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ADF_IOV_MSG_ACK_MAX_RETRY + \
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ADF_IOV_MSG_COLLISION_DETECT_DELAY)
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#endif /* ADF_IOV_MSG_H */
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