24 lines
1020 B
Plaintext
24 lines
1020 B
Plaintext
|
Tegra SOC USB controllers
|
||
|
|
|
||
|
|
The device node for a USB controller that is part of a Tegra
|
||
|
|
SOC is as described in the document "Open Firmware Recommended
|
||
|
|
Practice : Universal Serial Bus" with the following modifications
|
||
|
|
and additions :
|
||
|
|
|
||
|
|
Required properties :
|
||
|
|
- compatible : For Tegra20, must contain "nvidia,tegra20-ehci".
|
||
|
|
For Tegra30, must contain "nvidia,tegra30-ehci". Otherwise, must contain
|
||
|
|
"nvidia,<chip>-ehci" plus at least one of the above, where <chip> is
|
||
|
|
tegra114, tegra124, tegra132, or tegra210.
|
||
|
|
- nvidia,phy : phandle of the PHY that the controller is connected to.
|
||
|
|
- clocks : Must contain one entry, for the module clock.
|
||
|
|
See ../clocks/clock-bindings.txt for details.
|
||
|
|
- resets : Must contain an entry for each entry in reset-names.
|
||
|
|
See ../reset/reset.txt for details.
|
||
|
|
- reset-names : Must include the following entries:
|
||
|
|
- usb
|
||
|
|
|
||
|
|
Optional properties:
|
||
|
|
- nvidia,needs-double-reset : boolean is to be set for some of the Tegra20
|
||
|
|
USB ports, which need reset twice due to hardware issues.
|