46 lines
1.8 KiB
Plaintext
46 lines
1.8 KiB
Plaintext
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* Mediatek Universal Flash Storage (UFS) Host Controller
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UFS nodes are defined to describe on-chip UFS hardware macro.
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Each UFS Host Controller should have its own node.
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To bind UFS PHY with UFS host controller, the controller node should
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contain a phandle reference to UFS M-PHY node.
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Required properties for UFS nodes:
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- compatible : Compatible list, contains the following controller:
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"mediatek,mt8183-ufshci" for MediaTek UFS host controller
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present on MT8183 chipsets.
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"mediatek,mt8192-ufshci" for MediaTek UFS host controller
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present on MT8192 chipsets.
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- reg : Address and length of the UFS register set.
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- phys : phandle to m-phy.
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- clocks : List of phandle and clock specifier pairs.
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- clock-names : List of clock input name strings sorted in the same
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order as the clocks property. "ufs" is mandatory.
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"ufs": ufshci core control clock.
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- freq-table-hz : Array of <min max> operating frequencies stored in the same
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order as the clocks property. If this property is not
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defined or a value in the array is "0" then it is assumed
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that the frequency is set by the parent clock or a
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fixed rate clock source.
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- vcc-supply : phandle to VCC supply regulator node.
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Example:
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ufsphy: phy@11fa0000 {
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...
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};
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ufshci@11270000 {
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compatible = "mediatek,mt8183-ufshci";
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reg = <0 0x11270000 0 0x2300>;
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>;
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phys = <&ufsphy>;
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clocks = <&infracfg_ao INFRACFG_AO_UFS_CG>;
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clock-names = "ufs";
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freq-table-hz = <0 0>;
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vcc-supply = <&mt_pmic_vemc_ldo_reg>;
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};
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