380 lines
12 KiB
YAML
380 lines
12 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7622-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek MT7622 Pin Controller Device Tree Bindings
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maintainers:
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- Sean Wang <sean.wang@kernel.org>
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description: |+
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The MediaTek's MT7622 Pin controller is used to control SoC pins.
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properties:
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compatible:
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enum:
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- mediatek,mt7622-pinctrl
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- mediatek,mt7629-pinctrl
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reg:
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maxItems: 1
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reg-names:
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items:
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- const: eint
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gpio-controller: true
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"#gpio-cells":
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const: 2
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description: |
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Number of cells in GPIO specifier. Since the generic GPIO
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binding is used, the amount of cells must be specified as 2. See the below
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mentioned gpio binding representation for description of particular cells.
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interrupt-controller: true
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interrupts:
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maxItems: 1
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"#interrupt-cells":
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const: 2
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required:
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- compatible
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- reg
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- gpio-controller
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- "#gpio-cells"
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if:
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required:
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- interrupt-controller
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then:
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required:
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- reg-names
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- interrupts
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- "#interrupt-cells"
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patternProperties:
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'-[0-9]+$':
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type: object
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additionalProperties: false
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patternProperties:
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'mux':
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type: object
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additionalProperties: false
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description: |
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pinmux configuration nodes.
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$ref: "/schemas/pinctrl/pinmux-node.yaml"
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properties:
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function:
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description: |
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A string containing the name of the function to mux to the group.
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enum: [emmc, eth, i2c, i2s, ir, led, flash, pcie, pmic, pwm, sd,
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spi, tdm, uart, watchdog, wifi]
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groups:
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description: |
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An array of strings. Each string contains the name of a group.
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drive-strength:
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enum: [4, 8, 12, 16]
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required:
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- groups
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- function
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allOf:
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- if:
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properties:
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function:
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const: emmc
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then:
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properties:
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groups:
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items:
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enum: [emmc, emmc_rst]
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- if:
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properties:
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function:
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const: eth
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then:
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properties:
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groups:
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items:
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enum: [esw, esw_p0_p1, esw_p2_p3_p4, rgmii_via_esw,
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rgmii_via_gmac1, rgmii_via_gmac2, mdc_mdio]
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- if:
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properties:
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function:
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const: i2c
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then:
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properties:
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groups:
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enum: [i2c0, i2c_0, i2c_1, i2c1_0, i2c1_1, i2c1_2, i2c2_0,
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i2c2_1, i2c2_2]
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- if:
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properties:
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function:
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const: i2s
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then:
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properties:
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groups:
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items:
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enum: [i2s_in_mclk_bclk_ws, i2s1_in_data, i2s2_in_data,
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i2s3_in_data, i2s4_in_data, i2s_out_mclk_bclk_ws,
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i2s1_out_data, i2s2_out_data, i2s3_out_data,
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i2s4_out_data]
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- if:
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properties:
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function:
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const: ir
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then:
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properties:
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groups:
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enum: [ir_0_tx, ir_1_tx, ir_2_tx, ir_0_rx, ir_1_rx, ir_2_rx]
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- if:
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properties:
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function:
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const: led
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then:
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properties:
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groups:
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enum: [ephy_leds, ephy0_led, ephy1_led, ephy2_led, ephy3_led,
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ephy4_led, wled, wf2g_led, wf5g_led]
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- if:
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properties:
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function:
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const: flash
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then:
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properties:
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groups:
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enum: [par_nand, snfi, spi_nor]
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- if:
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properties:
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function:
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const: pcie
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then:
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properties:
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groups:
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items:
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enum: [pcie0_0_waken, pcie0_1_waken, pcie1_0_waken,
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pcie0_0_clkreq, pcie0_1_clkreq, pcie1_0_clkreq,
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pcie0_pad_perst, pcie1_pad_perst, pcie_pereset,
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pcie_wake, pcie_clkreq]
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- if:
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properties:
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function:
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const: pmic
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then:
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properties:
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groups:
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enum: [pmic_bus]
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- if:
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properties:
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function:
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const: pwm
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then:
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properties:
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groups:
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items:
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enum: [pwm_ch1_0, pwm_ch1_1, pwm_ch1_2, pwm_ch2_0, pwm_ch2_1,
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pwm_ch2_2, pwm_ch3_0, pwm_ch3_1, pwm_ch3_2, pwm_ch4_0,
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pwm_ch4_1, pwm_ch4_2, pwm_ch4_3, pwm_ch5_0, pwm_ch5_1,
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pwm_ch5_2, pwm_ch6_0, pwm_ch6_1, pwm_ch6_2, pwm_ch6_3,
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pwm_ch7_0, pwm_0, pwm_1]
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- if:
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properties:
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function:
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const: sd
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then:
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properties:
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groups:
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enum: [sd_0, sd_1]
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- if:
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properties:
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function:
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const: spi
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then:
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properties:
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groups:
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enum: [spic0_0, spic0_1, spic1_0, spic1_1, spic2_0_wp_hold,
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spic2_0, spi_0, spi_1, spi_wp, spi_hold]
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- if:
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properties:
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function:
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const: tdm
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then:
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properties:
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groups:
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enum: [tdm_0_out_mclk_bclk_ws, tdm_0_in_mclk_bclk_ws,
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tdm_0_out_data, tdm_0_in_data, tdm_1_out_mclk_bclk_ws,
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tdm_1_in_mclk_bclk_ws, tdm_1_out_data, tdm_1_in_data]
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- if:
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properties:
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function:
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const: uart
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then:
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properties:
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groups:
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enum: [uart0_0_tx_rx, uart1_0_tx_rx, uart1_0_rts_cts,
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uart1_1_tx_rx, uart1_1_rts_cts, uart2_0_tx_rx,
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uart2_0_rts_cts, uart2_1_tx_rx, uart2_1_rts_cts,
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uart2_2_tx_rx, uart2_2_rts_cts, uart2_3_tx_rx,
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uart3_0_tx_rx, uart3_1_tx_rx, uart3_1_rts_cts,
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uart4_0_tx_rx, uart4_1_tx_rx, uart4_1_rts_cts,
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uart4_2_tx_rx, uart4_2_rts_cts, uart0_txd_rxd,
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uart1_0_txd_rxd, uart1_0_cts_rts, uart1_1_txd_rxd,
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uart1_1_cts_rts, uart2_0_txd_rxd, uart2_0_cts_rts,
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uart2_1_txd_rxd, uart2_1_cts_rts]
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- if:
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properties:
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function:
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const: watchdog
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then:
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properties:
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groups:
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enum: [watchdog]
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- if:
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properties:
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function:
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const: wifi
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then:
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properties:
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groups:
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enum: [wf0_2g, wf0_5g]
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'conf':
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type: object
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additionalProperties: false
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description: |
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pinconf configuration nodes.
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$ref: "/schemas/pinctrl/pincfg-node.yaml"
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properties:
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groups:
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description: |
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An array of strings. Each string contains the name of a group.
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Valid values are the same as the pinmux node.
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pins:
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description: |
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An array of strings. Each string contains the name of a pin.
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items:
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enum: [GPIO_A, I2S1_IN, I2S1_OUT, I2S_BCLK, I2S_WS, I2S_MCLK, TXD0,
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RXD0, SPI_WP, SPI_HOLD, SPI_CLK, SPI_MOSI, SPI_MISO, SPI_CS,
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I2C_SDA, I2C_SCL, I2S2_IN, I2S3_IN, I2S4_IN, I2S2_OUT,
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I2S3_OUT, I2S4_OUT, GPIO_B, MDC, MDIO, G2_TXD0, G2_TXD1,
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G2_TXD2, G2_TXD3, G2_TXEN, G2_TXC, G2_RXD0, G2_RXD1, G2_RXD2,
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G2_RXD3, G2_RXDV, G2_RXC, NCEB, NWEB, NREB, NDL4, NDL5, NDL6,
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NDL7, NRB, NCLE, NALE, NDL0, NDL1, NDL2, NDL3, MDI_TP_P0,
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MDI_TN_P0, MDI_RP_P0, MDI_RN_P0, MDI_TP_P1, MDI_TN_P1,
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MDI_RP_P1, MDI_RN_P1, MDI_RP_P2, MDI_RN_P2, MDI_TP_P2,
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MDI_TN_P2, MDI_TP_P3, MDI_TN_P3, MDI_RP_P3, MDI_RN_P3,
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MDI_RP_P4, MDI_RN_P4, MDI_TP_P4, MDI_TN_P4, PMIC_SCL,
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PMIC_SDA, SPIC1_CLK, SPIC1_MOSI, SPIC1_MISO, SPIC1_CS,
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GPIO_D, WATCHDOG, RTS3_N, CTS3_N, TXD3, RXD3, PERST0_N,
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PERST1_N, WLED_N, EPHY_LED0_N, AUXIN0, AUXIN1, AUXIN2,
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AUXIN3, TXD4, RXD4, RTS4_N, CST4_N, PWM1, PWM2, PWM3, PWM4,
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PWM5, PWM6, PWM7, GPIO_E, TOP_5G_CLK, TOP_5G_DATA,
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WF0_5G_HB0, WF0_5G_HB1, WF0_5G_HB2, WF0_5G_HB3, WF0_5G_HB4,
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WF0_5G_HB5, WF0_5G_HB6, XO_REQ, TOP_RST_N, SYS_WATCHDOG,
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EPHY_LED0_N_JTDO, EPHY_LED1_N_JTDI, EPHY_LED2_N_JTMS,
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EPHY_LED3_N_JTCLK, EPHY_LED4_N_JTRST_N, WF2G_LED_N,
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WF5G_LED_N, GPIO_9, GPIO_10, GPIO_11, GPIO_12, UART1_TXD,
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UART1_RXD, UART1_CTS, UART1_RTS, UART2_TXD, UART2_RXD,
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UART2_CTS, UART2_RTS, SMI_MDC, SMI_MDIO, PCIE_PERESET_N,
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PWM_0, GPIO_0, GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5,
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GPIO_6, GPIO_7, GPIO_8, UART0_TXD, UART0_RXD, TOP_2G_CLK,
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TOP_2G_DATA, WF0_2G_HB0, WF0_2G_HB1, WF0_2G_HB2, WF0_2G_HB3,
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WF0_2G_HB4, WF0_2G_HB5, WF0_2G_HB6]
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bias-disable: true
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bias-pull-up: true
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bias-pull-down: true
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input-enable: true
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input-disable: true
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output-enable: true
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output-low: true
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output-high: true
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input-schmitt-enable: true
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input-schmitt-disable: true
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drive-strength:
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enum: [4, 8, 12, 16]
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slew-rate:
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enum: [0, 1]
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mediatek,tdsel:
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description: |
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An integer describing the steps for output level shifter duty
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cycle when asserted (high pulse width adjustment). Valid arguments
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are from 0 to 15.
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$ref: /schemas/types.yaml#/definitions/uint32
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mediatek,rdsel:
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description: |
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An integer describing the steps for input level shifter duty cycle
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when asserted (high pulse width adjustment). Valid arguments are
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from 0 to 63.
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$ref: /schemas/types.yaml#/definitions/uint32
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required:
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- pins
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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pio: pinctrl@10211000 {
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compatible = "mediatek,mt7622-pinctrl";
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reg = <0 0x10211000 0 0x1000>;
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gpio-controller;
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#gpio-cells = <2>;
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|
|
pinctrl_eth_default: eth-0 {
|
||
|
|
mux-mdio {
|
||
|
|
groups = "mdc_mdio";
|
||
|
|
function = "eth";
|
||
|
|
drive-strength = <12>;
|
||
|
|
};
|
||
|
|
|
||
|
|
mux-gmac2 {
|
||
|
|
groups = "rgmii_via_gmac2";
|
||
|
|
function = "eth";
|
||
|
|
drive-strength = <12>;
|
||
|
|
};
|
||
|
|
|
||
|
|
mux-esw {
|
||
|
|
groups = "esw";
|
||
|
|
function = "eth";
|
||
|
|
drive-strength = <8>;
|
||
|
|
};
|
||
|
|
|
||
|
|
conf-mdio {
|
||
|
|
pins = "MDC";
|
||
|
|
bias-pull-up;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|