64 lines
2.2 KiB
Plaintext
64 lines
2.2 KiB
Plaintext
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Texas Instruments OMAP compatible OPP supply description
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OMAP5, DRA7, and AM57 family of SoCs have Class0 AVS eFuse registers which
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contain data that can be used to adjust voltages programmed for some of their
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supplies for more efficient operation. This binding provides the information
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needed to read these values and use them to program the main regulator during
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an OPP transitions.
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Also, some supplies may have an associated vbb-supply which is an Adaptive Body
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Bias regulator which much be transitioned in a specific sequence with regards
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to the vdd-supply and clk when making an OPP transition. By supplying two
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regulators to the device that will undergo OPP transitions we can make use
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of the multi regulator binding that is part of the OPP core described here [1]
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to describe both regulators needed by the platform.
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[1] Documentation/devicetree/bindings/opp/opp-v2.yaml
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Required Properties for Device Node:
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- vdd-supply: phandle to regulator controlling VDD supply
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- vbb-supply: phandle to regulator controlling Body Bias supply
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(Usually Adaptive Body Bias regulator)
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Required Properties for opp-supply node:
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- compatible: Should be one of:
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"ti,omap-opp-supply" - basic OPP supply controlling VDD and VBB
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"ti,omap5-opp-supply" - OMAP5+ optimized voltages in efuse(class0)VDD
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along with VBB
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"ti,omap5-core-opp-supply" - OMAP5+ optimized voltages in efuse(class0) VDD
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but no VBB.
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- reg: Address and length of the efuse register set for the device (mandatory
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only for "ti,omap5-opp-supply")
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- ti,efuse-settings: An array of u32 tuple items providing information about
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optimized efuse configuration. Each item consists of the following:
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volt: voltage in uV - reference voltage (OPP voltage)
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efuse_offseet: efuse offset from reg where the optimized voltage is stored.
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- ti,absolute-max-voltage-uv: absolute maximum voltage for the OPP supply.
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Example:
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/* Device Node (CPU) */
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cpus {
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cpu0: cpu@0 {
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device_type = "cpu";
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...
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vdd-supply = <&vcc>;
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vbb-supply = <&abb_mpu>;
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};
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};
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/* OMAP OPP Supply with Class0 registers */
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opp_supply_mpu: opp_supply@4a003b20 {
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compatible = "ti,omap5-opp-supply";
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reg = <0x4a003b20 0x8>;
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ti,efuse-settings = <
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/* uV offset */
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1060000 0x0
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1160000 0x4
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1210000 0x8
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>;
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ti,absolute-max-voltage-uv = <1500000>;
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};
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