49 lines
1.4 KiB
Plaintext
49 lines
1.4 KiB
Plaintext
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* Qualcomm AHCI SATA Controller
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SATA nodes are defined to describe on-chip Serial ATA controllers.
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Each SATA controller should have its own node.
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Required properties:
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- compatible : compatible list, must contain "generic-ahci"
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- interrupts : <interrupt mapping for SATA IRQ>
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- reg : <registers mapping>
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- phys : Must contain exactly one entry as specified
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in phy-bindings.txt
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- phy-names : Must be "sata-phy"
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Required properties for "qcom,ipq806x-ahci" compatible:
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- clocks : Must contain an entry for each entry in clock-names.
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- clock-names : Shall be:
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"slave_iface" - Fabric port AHB clock for SATA
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"iface" - AHB clock
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"core" - core clock
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"rxoob" - RX out-of-band clock
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"pmalive" - Power Module Alive clock
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- assigned-clocks : Shall be:
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SATA_RXOOB_CLK
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SATA_PMALIVE_CLK
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- assigned-clock-rates : Shall be:
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100Mhz (100000000) for SATA_RXOOB_CLK
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100Mhz (100000000) for SATA_PMALIVE_CLK
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Example:
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sata@29000000 {
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compatible = "qcom,ipq806x-ahci", "generic-ahci";
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reg = <0x29000000 0x180>;
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interrupts = <0 209 0x0>;
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clocks = <&gcc SFAB_SATA_S_H_CLK>,
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<&gcc SATA_H_CLK>,
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<&gcc SATA_A_CLK>,
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<&gcc SATA_RXOOB_CLK>,
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<&gcc SATA_PMALIVE_CLK>;
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clock-names = "slave_iface", "iface", "core",
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"rxoob", "pmalive";
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assigned-clocks = <&gcc SATA_RXOOB_CLK>, <&gcc SATA_PMALIVE_CLK>;
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assigned-clock-rates = <100000000>, <100000000>;
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phys = <&sata_phy>;
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phy-names = "sata-phy";
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};
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