92 lines
2.0 KiB
YAML
92 lines
2.0 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/ata/faraday,ftide010.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Faraday Technology FTIDE010 PATA controller
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maintainers:
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- Linus Walleij <linus.walleij@linaro.org>
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description: |
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This controller is the first Faraday IDE interface block, used in the
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StorLink SL3512 and SL3516, later known as the Cortina Systems Gemini
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platform. The controller can do PIO modes 0 through 4, Multi-word DMA
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(MWDM) modes 0 through 2 and Ultra DMA modes 0 through 6.
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On the Gemini platform, this PATA block is accompanied by a PATA to
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SATA bridge in order to support SATA. This is why a phandle to that
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controller is compulsory on that platform.
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The timing properties are unique per-SoC, not per-board.
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properties:
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compatible:
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oneOf:
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- const: faraday,ftide010
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- items:
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- const: cortina,gemini-pata
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- const: faraday,ftide010
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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minItems: 1
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clock-names:
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const: PCLK
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sata:
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description:
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phandle to the Gemini PATA to SATA bridge, if available
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$ref: /schemas/types.yaml#/definitions/phandle
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required:
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- compatible
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- reg
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- interrupts
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allOf:
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- $ref: pata-common.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: cortina,gemini-pata
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then:
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required:
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- sata
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/cortina,gemini-clock.h>
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ide@63000000 {
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compatible = "cortina,gemini-pata", "faraday,ftide010";
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reg = <0x63000000 0x100>;
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interrupts = <4 IRQ_TYPE_EDGE_RISING>;
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clocks = <&gcc GEMINI_CLK_GATE_IDE>;
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clock-names = "PCLK";
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sata = <&sata>;
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#address-cells = <1>;
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#size-cells = <0>;
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ide-port@0 {
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reg = <0>;
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};
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ide-port@1 {
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reg = <1>;
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};
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};
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...
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