68 lines
2.0 KiB
YAML
68 lines
2.0 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/microchip,sparx5.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip Sparx5 Boards Device Tree Bindings
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maintainers:
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- Lars Povlsen <lars.povlsen@microchip.com>
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description: |+
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The Microchip Sparx5 SoC is a ARMv8-based used in a family of
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gigabit TSN-capable gigabit switches.
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The SparX-5 Ethernet switch family provides a rich set of switching
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features such as advanced TCAM-based VLAN and QoS processing
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enabling delivery of differentiated services, and security through
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TCAM-based frame processing using versatile content aware processor
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(VCAP)
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properties:
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$nodename:
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const: '/'
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compatible:
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oneOf:
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- description: The Sparx5 pcb125 board is a modular board,
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which has both spi-nor and eMMC storage. The modular design
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allows for connection of different network ports.
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items:
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- const: microchip,sparx5-pcb125
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- const: microchip,sparx5
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- description: The Sparx5 pcb134 is a pizzabox form factor
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gigabit switch with 20 SFP ports. It features spi-nor and
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either spi-nand or eMMC storage (mount option).
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items:
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- const: microchip,sparx5-pcb134
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- const: microchip,sparx5
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- description: The Sparx5 pcb135 is a pizzabox form factor
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gigabit switch with 48+4 Cu ports. It features spi-nor and
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either spi-nand or eMMC storage (mount option).
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items:
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- const: microchip,sparx5-pcb135
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- const: microchip,sparx5
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axi@600000000:
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type: object
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description: the root node in the Sparx5 platforms must contain
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an axi bus child node. They are always at physical address
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0x600000000 in all the Sparx5 variants.
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properties:
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compatible:
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items:
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- const: simple-bus
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required:
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- compatible
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required:
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- compatible
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- axi@600000000
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additionalProperties: true
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...
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