290 lines
6.5 KiB
C
290 lines
6.5 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Innolux/Chimei EJ030NA TFT LCD panel driver
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*
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* Copyright (C) 2020, Paul Cercueil <paul@crapouillou.net>
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* Copyright (C) 2020, Christophe Branchereau <cbranchereau@gmail.com>
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/gpio/consumer.h>
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#include <linux/media-bus-format.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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#include <drm/drm_modes.h>
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#include <drm/drm_panel.h>
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struct ej030na_info {
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const struct drm_display_mode *display_modes;
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unsigned int num_modes;
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u16 width_mm, height_mm;
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u32 bus_format, bus_flags;
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};
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struct ej030na {
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struct drm_panel panel;
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struct spi_device *spi;
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struct regmap *map;
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const struct ej030na_info *panel_info;
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struct regulator *supply;
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struct gpio_desc *reset_gpio;
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};
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static inline struct ej030na *to_ej030na(struct drm_panel *panel)
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{
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return container_of(panel, struct ej030na, panel);
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}
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static const struct reg_sequence ej030na_init_sequence[] = {
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{ 0x05, 0x1e },
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{ 0x05, 0x5c },
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{ 0x02, 0x14 },
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{ 0x03, 0x40 },
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{ 0x04, 0x07 },
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{ 0x06, 0x12 },
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{ 0x07, 0xd2 },
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{ 0x0c, 0x06 },
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{ 0x0d, 0x40 },
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{ 0x0e, 0x40 },
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{ 0x0f, 0x40 },
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{ 0x10, 0x40 },
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{ 0x11, 0x40 },
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{ 0x2f, 0x40 },
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{ 0x5a, 0x02 },
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{ 0x30, 0x07 },
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{ 0x31, 0x57 },
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{ 0x32, 0x53 },
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{ 0x33, 0x77 },
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{ 0x34, 0xb8 },
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{ 0x35, 0xbd },
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{ 0x36, 0xb8 },
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{ 0x37, 0xe7 },
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{ 0x38, 0x04 },
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{ 0x39, 0xff },
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{ 0x40, 0x0b },
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{ 0x41, 0xb8 },
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{ 0x42, 0xab },
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{ 0x43, 0xb9 },
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{ 0x44, 0x6a },
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{ 0x45, 0x56 },
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{ 0x46, 0x61 },
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{ 0x47, 0x08 },
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{ 0x48, 0x0f },
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{ 0x49, 0x0f },
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{ 0x2b, 0x01 },
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};
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static int ej030na_prepare(struct drm_panel *panel)
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{
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struct ej030na *priv = to_ej030na(panel);
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struct device *dev = &priv->spi->dev;
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int err;
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err = regulator_enable(priv->supply);
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if (err) {
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dev_err(dev, "Failed to enable power supply: %d\n", err);
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return err;
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}
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/* Reset the chip */
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gpiod_set_value_cansleep(priv->reset_gpio, 1);
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usleep_range(50, 150);
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gpiod_set_value_cansleep(priv->reset_gpio, 0);
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usleep_range(50, 150);
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err = regmap_multi_reg_write(priv->map, ej030na_init_sequence,
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ARRAY_SIZE(ej030na_init_sequence));
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if (err) {
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dev_err(dev, "Failed to init registers: %d\n", err);
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goto err_disable_regulator;
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}
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msleep(120);
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return 0;
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err_disable_regulator:
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regulator_disable(priv->supply);
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return err;
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}
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static int ej030na_unprepare(struct drm_panel *panel)
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{
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struct ej030na *priv = to_ej030na(panel);
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gpiod_set_value_cansleep(priv->reset_gpio, 1);
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regulator_disable(priv->supply);
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return 0;
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}
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static int ej030na_get_modes(struct drm_panel *panel,
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struct drm_connector *connector)
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{
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struct ej030na *priv = to_ej030na(panel);
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const struct ej030na_info *panel_info = priv->panel_info;
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struct drm_display_mode *mode;
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unsigned int i;
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for (i = 0; i < panel_info->num_modes; i++) {
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mode = drm_mode_duplicate(connector->dev,
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&panel_info->display_modes[i]);
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if (!mode)
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return -ENOMEM;
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drm_mode_set_name(mode);
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mode->type = DRM_MODE_TYPE_DRIVER;
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if (panel_info->num_modes == 1)
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mode->type |= DRM_MODE_TYPE_PREFERRED;
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drm_mode_probed_add(connector, mode);
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}
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connector->display_info.bpc = 8;
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connector->display_info.width_mm = panel_info->width_mm;
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connector->display_info.height_mm = panel_info->height_mm;
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drm_display_info_set_bus_formats(&connector->display_info,
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&panel_info->bus_format, 1);
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connector->display_info.bus_flags = panel_info->bus_flags;
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return panel_info->num_modes;
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}
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static const struct drm_panel_funcs ej030na_funcs = {
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.prepare = ej030na_prepare,
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.unprepare = ej030na_unprepare,
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.get_modes = ej030na_get_modes,
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};
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static const struct regmap_config ej030na_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = 0x5a,
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};
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static int ej030na_probe(struct spi_device *spi)
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{
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struct device *dev = &spi->dev;
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struct ej030na *priv;
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int err;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->spi = spi;
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spi_set_drvdata(spi, priv);
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priv->map = devm_regmap_init_spi(spi, &ej030na_regmap_config);
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if (IS_ERR(priv->map)) {
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dev_err(dev, "Unable to init regmap\n");
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return PTR_ERR(priv->map);
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}
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priv->panel_info = of_device_get_match_data(dev);
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if (!priv->panel_info)
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return -EINVAL;
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priv->supply = devm_regulator_get(dev, "power");
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if (IS_ERR(priv->supply)) {
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dev_err(dev, "Failed to get power supply\n");
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return PTR_ERR(priv->supply);
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}
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priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
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if (IS_ERR(priv->reset_gpio)) {
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dev_err(dev, "Failed to get reset GPIO\n");
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return PTR_ERR(priv->reset_gpio);
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}
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drm_panel_init(&priv->panel, dev, &ej030na_funcs,
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DRM_MODE_CONNECTOR_DPI);
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err = drm_panel_of_backlight(&priv->panel);
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if (err)
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return err;
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drm_panel_add(&priv->panel);
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return 0;
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}
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static int ej030na_remove(struct spi_device *spi)
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{
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struct ej030na *priv = spi_get_drvdata(spi);
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drm_panel_remove(&priv->panel);
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drm_panel_disable(&priv->panel);
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drm_panel_unprepare(&priv->panel);
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return 0;
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}
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static const struct drm_display_mode ej030na_modes[] = {
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{ /* 60 Hz */
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.clock = 14400,
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.hdisplay = 320,
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.hsync_start = 320 + 10,
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.hsync_end = 320 + 10 + 37,
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.htotal = 320 + 10 + 37 + 33,
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.vdisplay = 480,
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.vsync_start = 480 + 102,
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.vsync_end = 480 + 102 + 9 + 9,
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.vtotal = 480 + 102 + 9 + 9,
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.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
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},
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{ /* 50 Hz */
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.clock = 12000,
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.hdisplay = 320,
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.hsync_start = 320 + 10,
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.hsync_end = 320 + 10 + 37,
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.htotal = 320 + 10 + 37 + 33,
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.vdisplay = 480,
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.vsync_start = 480 + 102,
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.vsync_end = 480 + 102 + 9,
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.vtotal = 480 + 102 + 9 + 9,
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.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
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},
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};
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static const struct ej030na_info ej030na_info = {
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.display_modes = ej030na_modes,
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.num_modes = ARRAY_SIZE(ej030na_modes),
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.width_mm = 70,
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.height_mm = 51,
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.bus_format = MEDIA_BUS_FMT_RGB888_3X8_DELTA,
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.bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE | DRM_BUS_FLAG_DE_LOW,
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};
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static const struct of_device_id ej030na_of_match[] = {
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{ .compatible = "innolux,ej030na", .data = &ej030na_info },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, ej030na_of_match);
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static struct spi_driver ej030na_driver = {
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.driver = {
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.name = "panel-innolux-ej030na",
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.of_match_table = ej030na_of_match,
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},
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.probe = ej030na_probe,
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.remove = ej030na_remove,
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};
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module_spi_driver(ej030na_driver);
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MODULE_AUTHOR("Paul Cercueil <paul@crapouillou.net>");
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MODULE_AUTHOR("Christophe Branchereau <cbranchereau@gmail.com>");
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MODULE_LICENSE("GPL v2");
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