95 lines
2.1 KiB
ArmAsm
95 lines
2.1 KiB
ArmAsm
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* OpenRISC memset.S
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*
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* Hand-optimized assembler version of memset for OpenRISC.
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* Algorithm inspired by several other arch-specific memset routines
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* in the kernel tree
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*
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* Copyright (C) 2015 Olof Kindgren <olof.kindgren@gmail.com>
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*/
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.global memset
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.type memset, @function
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memset:
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/* arguments:
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* r3 = *s
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* r4 = c
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* r5 = n
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* r13, r15, r17, r19 used as temp regs
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*/
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/* Exit if n == 0 */
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l.sfeqi r5, 0
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l.bf 4f
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/* Truncate c to char */
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l.andi r13, r4, 0xff
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/* Skip word extension if c is 0 */
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l.sfeqi r13, 0
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l.bf 1f
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/* Check for at least two whole words (8 bytes) */
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l.sfleui r5, 7
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/* Extend char c to 32-bit word cccc in r13 */
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l.slli r15, r13, 16 // r13 = 000c, r15 = 0c00
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l.or r13, r13, r15 // r13 = 0c0c, r15 = 0c00
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l.slli r15, r13, 8 // r13 = 0c0c, r15 = c0c0
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l.or r13, r13, r15 // r13 = cccc, r15 = c0c0
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1: l.addi r19, r3, 0 // Set r19 = src
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/* Jump to byte copy loop if less than two words */
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l.bf 3f
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l.or r17, r5, r0 // Set r17 = n
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/* Mask out two LSBs to check alignment */
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l.andi r15, r3, 0x3
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/* lsb == 00, jump to word copy loop */
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l.sfeqi r15, 0
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l.bf 2f
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l.addi r19, r3, 0 // Set r19 = src
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/* lsb == 01,10 or 11 */
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l.sb 0(r3), r13 // *src = c
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l.addi r17, r17, -1 // Decrease n
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l.sfeqi r15, 3
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l.bf 2f
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l.addi r19, r3, 1 // src += 1
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/* lsb == 01 or 10 */
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l.sb 1(r3), r13 // *(src+1) = c
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l.addi r17, r17, -1 // Decrease n
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l.sfeqi r15, 2
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l.bf 2f
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l.addi r19, r3, 2 // src += 2
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/* lsb == 01 */
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l.sb 2(r3), r13 // *(src+2) = c
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l.addi r17, r17, -1 // Decrease n
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l.addi r19, r3, 3 // src += 3
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/* Word copy loop */
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2: l.sw 0(r19), r13 // *src = cccc
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l.addi r17, r17, -4 // Decrease n
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l.sfgeui r17, 4
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l.bf 2b
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l.addi r19, r19, 4 // Increase src
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/* When n > 0, copy the remaining bytes, otherwise jump to exit */
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l.sfeqi r17, 0
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l.bf 4f
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/* Byte copy loop */
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3: l.addi r17, r17, -1 // Decrease n
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l.sb 0(r19), r13 // *src = cccc
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l.sfnei r17, 0
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l.bf 3b
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l.addi r19, r19, 1 // Increase src
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4: l.jr r9
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l.ori r11, r3, 0
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