78 lines
1.9 KiB
C
78 lines
1.9 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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*
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* Based on powerpc version
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*/
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#ifndef __ASM_MICROBLAZE_PCI_H
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#define __ASM_MICROBLAZE_PCI_H
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/dma-mapping.h>
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#include <linux/pci.h>
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#include <linux/scatterlist.h>
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#include <asm/io.h>
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#include <asm/pci-bridge.h>
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#define PCIBIOS_MIN_IO 0x1000
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#define PCIBIOS_MIN_MEM 0x10000000
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/* Values for the `which' argument to sys_pciconfig_iobase syscall. */
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#define IOBASE_BRIDGE_NUMBER 0
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#define IOBASE_MEMORY 1
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#define IOBASE_IO 2
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#define IOBASE_ISA_IO 3
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#define IOBASE_ISA_MEM 4
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#define pcibios_scan_all_fns(a, b) 0
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/*
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* Set this to 1 if you want the kernel to re-assign all PCI
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* bus numbers (don't do that on ppc64 yet !)
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*/
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#define pcibios_assign_all_busses() 0
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extern int pci_domain_nr(struct pci_bus *bus);
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/* Decide whether to display the domain number in /proc */
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extern int pci_proc_domain(struct pci_bus *bus);
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struct vm_area_struct;
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/* Tell PCI code what kind of PCI resource mappings we support */
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#define HAVE_PCI_MMAP 1
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#define ARCH_GENERIC_PCI_MMAP_RESOURCE 1
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#define arch_can_pci_mmap_io() 1
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extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
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size_t count);
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extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
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size_t count);
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extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state);
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#define HAVE_PCI_LEGACY 1
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extern void pcibios_resource_survey(void);
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struct file;
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extern pgprot_t pci_phys_mem_access_prot(struct file *file,
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unsigned long pfn,
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unsigned long size,
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pgprot_t prot);
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/* This part of code was originally in xilinx-pci.h */
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#ifdef CONFIG_PCI_XILINX
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extern void __init xilinx_pci_init(void);
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#else
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static inline void __init xilinx_pci_init(void) { return; }
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#endif
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#endif /* __KERNEL__ */
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#endif /* __ASM_MICROBLAZE_PCI_H */
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