43 lines
1.2 KiB
Plaintext
43 lines
1.2 KiB
Plaintext
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Mediatek AFE PCM controller for mt6797
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Required properties:
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- compatible = "mediatek,mt6797-audio";
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- reg: register location and size
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- interrupts: should contain AFE interrupt
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- power-domains: should define the power domain
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- clocks: Must contain an entry for each entry in clock-names
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- clock-names: should have these clock names:
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"infra_sys_audio_clk",
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"infra_sys_audio_26m",
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"mtkaif_26m_clk",
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"top_mux_audio",
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"top_mux_aud_intbus",
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"top_sys_pll3_d4",
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"top_sys_pll1_d4",
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"top_clk26m_clk";
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Example:
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afe: mt6797-afe-pcm@11220000 {
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compatible = "mediatek,mt6797-audio";
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reg = <0 0x11220000 0 0x1000>;
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interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_LOW>;
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power-domains = <&scpsys MT6797_POWER_DOMAIN_AUDIO>;
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clocks = <&infrasys CLK_INFRA_AUDIO>,
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<&infrasys CLK_INFRA_AUDIO_26M>,
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<&infrasys CLK_INFRA_AUDIO_26M_PAD_TOP>,
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<&topckgen CLK_TOP_MUX_AUDIO>,
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<&topckgen CLK_TOP_MUX_AUD_INTBUS>,
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<&topckgen CLK_TOP_SYSPLL3_D4>,
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<&topckgen CLK_TOP_SYSPLL1_D4>,
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<&clk26m>;
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clock-names = "infra_sys_audio_clk",
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"infra_sys_audio_26m",
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"mtkaif_26m_clk",
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"top_mux_audio",
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"top_mux_aud_intbus",
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"top_sys_pll3_d4",
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"top_sys_pll1_d4",
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"top_clk26m_clk";
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};
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