67 lines
1.4 KiB
YAML
67 lines
1.4 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/serial/cdns,uart.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence UART Controller Device Tree Bindings
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maintainers:
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- Michal Simek <michal.simek@xilinx.com>
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allOf:
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- $ref: /schemas/serial.yaml#
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properties:
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compatible:
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oneOf:
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- description: UART controller for Zynq-7xxx SoC
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items:
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- const: xlnx,xuartps
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- const: cdns,uart-r1p8
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- description: UART controller for Zynq Ultrascale+ MPSoC
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items:
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- const: xlnx,zynqmp-uart
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- const: cdns,uart-r1p12
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 2
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clock-names:
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items:
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- const: uart_clk
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- const: pclk
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cts-override:
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description: |
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Override the CTS modem status signal. This signal will
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always be reported as active instead of being obtained
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from the modem status register. Define this if your serial
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port does not use this pin.
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type: boolean
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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uart0: serial@e0000000 {
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compatible = "xlnx,xuartps", "cdns,uart-r1p8";
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clocks = <&clkc 23>, <&clkc 40>;
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clock-names = "uart_clk", "pclk";
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reg = <0xE0000000 0x1000>;
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interrupts = <0 27 4>;
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};
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