kernel/Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt

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2024-07-22 17:22:30 +08:00
TI SOC based PWM Subsystem
Required properties:
- compatible: Must be "ti,<soc>-pwmss".
for am33xx - compatible = "ti,am33xx-pwmss";
for am4372 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
for dra746 - compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss"
- reg: physical base address and size of the registers map.
- address-cells: Specify the number of u32 entries needed in child nodes.
Should set to 1.
- size-cells: specify number of u32 entries needed to specify child nodes size
in reg property. Should set to 1.
- ranges: describes the address mapping of a memory-mapped bus. Should set to
physical address map of child's base address, physical address within
parent's address space and length of the address map. For am33xx,
3 set of child register maps present, ECAP register space, EQEP
register space, EHRPWM register space.
Also child nodes should also populated under PWMSS DT node.
Example:
epwmss0: epwmss@48300000 { /* PWMSS for am33xx */
compatible = "ti,am33xx-pwmss";
reg = <0x48300000 0x10>;
ti,hwmods = "epwmss0";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x48300100 0x48300100 0x80 /* ECAP */
0x48300180 0x48300180 0x80 /* EQEP */
0x48300200 0x48300200 0x80>; /* EHRPWM */
/* child nodes go here */
};
epwmss0: epwmss@48300000 { /* PWMSS for am4372 */
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"
reg = <0x48300000 0x10>;
ti,hwmods = "epwmss0";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x48300100 0x48300100 0x80 /* ECAP */
0x48300180 0x48300180 0x80 /* EQEP */
0x48300200 0x48300200 0x80>; /* EHRPWM */
/* child nodes go here */
};
epwmss0: epwmss@4843e000 { /* PWMSS for DRA7xx */
compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss";
reg = <0x4843e000 0x30>;
ti,hwmods = "epwmss0";
#address-cells = <1>;
#size-cells = <1>;
ranges;
/* child nodes go here */
};