64 lines
1.9 KiB
Plaintext
64 lines
1.9 KiB
Plaintext
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Amlogic Meson Power Controller
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==============================
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The Amlogic Meson SoCs embeds an internal Power domain controller.
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VPU Power Domain
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----------------
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The Video Processing Unit power domain is controlled by this power controller,
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but the domain requires some external resources to meet the correct power
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sequences.
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The bindings must respect the power domain bindings as described in the file
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power-domain.yaml
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Device Tree Bindings:
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---------------------
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Required properties:
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- compatible: should be one of the following :
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- "amlogic,meson-gx-pwrc-vpu" for the Meson GX SoCs
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- "amlogic,meson-g12a-pwrc-vpu" for the Meson G12A SoCs
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- #power-domain-cells: should be 0
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- amlogic,hhi-sysctrl: phandle to the HHI sysctrl node
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- resets: phandles to the reset lines needed for this power demain sequence
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as described in ../reset/reset.txt
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- clocks: from common clock binding: handle to VPU and VAPB clocks
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- clock-names: from common clock binding: must contain "vpu", "vapb"
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corresponding to entry in the clocks property.
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Parent node should have the following properties :
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- compatible: "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"
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- reg: base address and size of the AO system control register space.
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Example:
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-------
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ao_sysctrl: sys-ctrl@0 {
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compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd";
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reg = <0x0 0x0 0x0 0x100>;
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pwrc_vpu: power-controller-vpu {
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compatible = "amlogic,meson-gx-pwrc-vpu";
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#power-domain-cells = <0>;
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amlogic,hhi-sysctrl = <&sysctrl>;
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resets = <&reset RESET_VIU>,
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<&reset RESET_VENC>,
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<&reset RESET_VCBUS>,
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<&reset RESET_BT656>,
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<&reset RESET_DVIN_RESET>,
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<&reset RESET_RDMA>,
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<&reset RESET_VENCI>,
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<&reset RESET_VENCP>,
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<&reset RESET_VDAC>,
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<&reset RESET_VDI6>,
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<&reset RESET_VENCL>,
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<&reset RESET_VID_LOCK>;
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clocks = <&clkc CLKID_VPU>,
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<&clkc CLKID_VAPB>;
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clock-names = "vpu", "vapb";
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};
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};
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