133 lines
3.6 KiB
YAML
133 lines
3.6 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/dsa/nxp,sja1105.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP SJA1105 Automotive Ethernet Switch Family Device Tree Bindings
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description:
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The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944.pdf) of at
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least one half of t_CLK. At an SPI frequency of 1MHz, this means a minimum
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cs_sck_delay of 500ns. Ensuring that this SPI timing requirement is observed
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depends on the SPI bus master driver.
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allOf:
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- $ref: "dsa.yaml#"
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maintainers:
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- Vladimir Oltean <vladimir.oltean@nxp.com>
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properties:
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compatible:
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enum:
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- nxp,sja1105e
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- nxp,sja1105t
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- nxp,sja1105p
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- nxp,sja1105q
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- nxp,sja1105r
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- nxp,sja1105s
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- nxp,sja1110a
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- nxp,sja1110b
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- nxp,sja1110c
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- nxp,sja1110d
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reg:
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maxItems: 1
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# Optional container node for the 2 internal MDIO buses of the SJA1110
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# (one for the internal 100base-T1 PHYs and the other for the single
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# 100base-TX PHY). The "reg" property does not have physical significance.
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# The PHY addresses to port correspondence is as follows: for 100base-T1,
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# port 5 has PHY 1, port 6 has PHY 2 etc, while for 100base-TX, port 1 has
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# PHY 1.
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mdios:
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type: object
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properties:
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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patternProperties:
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"^mdio@[0-1]$":
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type: object
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allOf:
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- $ref: "http://devicetree.org/schemas/net/mdio.yaml#"
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properties:
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compatible:
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oneOf:
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- enum:
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- nxp,sja1110-base-t1-mdio
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- nxp,sja1110-base-tx-mdio
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reg:
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oneOf:
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- enum:
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- 0
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- 1
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required:
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- compatible
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- reg
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-switch@1 {
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reg = <0x1>;
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compatible = "nxp,sja1105t";
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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phy-handle = <&rgmii_phy6>;
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phy-mode = "rgmii-id";
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reg = <0>;
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};
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port@1 {
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phy-handle = <&rgmii_phy3>;
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phy-mode = "rgmii-id";
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reg = <1>;
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};
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port@2 {
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phy-handle = <&rgmii_phy4>;
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phy-mode = "rgmii-id";
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reg = <2>;
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};
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port@3 {
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phy-mode = "rgmii-id";
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reg = <3>;
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};
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port@4 {
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ethernet = <&enet2>;
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phy-mode = "rgmii";
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reg = <4>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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};
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