120 lines
3.4 KiB
YAML
120 lines
3.4 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip designware mobile storage host controller device tree bindings
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description:
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Rockchip uses the Synopsys designware mobile storage host controller
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to interface a SoC with storage medium such as eMMC or SD/MMC cards.
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This file documents the combined properties for the core Synopsys dw mshc
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controller that are not already included in the synopsys-dw-mshc-common.yaml
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file and the Rockchip specific extensions.
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allOf:
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- $ref: "synopsys-dw-mshc-common.yaml#"
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maintainers:
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- Heiko Stuebner <heiko@sntech.de>
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# Everything else is described in the common file
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properties:
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compatible:
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oneOf:
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# for Rockchip RK2928 and before RK3288
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- const: rockchip,rk2928-dw-mshc
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# for Rockchip RK3288
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- const: rockchip,rk3288-dw-mshc
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- items:
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- enum:
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- rockchip,px30-dw-mshc
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- rockchip,rk1808-dw-mshc
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- rockchip,rk3036-dw-mshc
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- rockchip,rk3228-dw-mshc
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- rockchip,rk3308-dw-mshc
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- rockchip,rk3328-dw-mshc
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- rockchip,rk3368-dw-mshc
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- rockchip,rk3399-dw-mshc
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- rockchip,rk3568-dw-mshc
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- rockchip,rv1108-dw-mshc
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- const: rockchip,rk3288-dw-mshc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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minItems: 2
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maxItems: 4
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description:
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Handle to "biu" and "ciu" clocks for the bus interface unit clock and
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the card interface unit clock. If "ciu-drive" and "ciu-sample" are
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specified in clock-names, it should also contain
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handles to these clocks.
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clock-names:
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minItems: 2
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items:
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- const: biu
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- const: ciu
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- const: ciu-drive
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- const: ciu-sample
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description:
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Apart from the clock-names "biu" and "ciu" two more clocks
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"ciu-drive" and "ciu-sample" are supported. They are used
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to control the clock phases, "ciu-sample" is required for tuning
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high speed modes.
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rockchip,default-sample-phase:
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 360
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default: 0
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description:
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The default phase to set "ciu-sample" at probing,
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low speeds or in case where all phases work at tuning time.
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If not specified 0 deg will be used.
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rockchip,desired-num-phases:
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 360
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default: 360
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description:
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The desired number of times that the host execute tuning when needed.
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If not specified, the host will do tuning for 360 times,
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namely tuning for each degree.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3288-cru.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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sdmmc: mmc@ff0c0000 {
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compatible = "rockchip,rk3288-dw-mshc";
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reg = <0xff0c0000 0x4000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
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<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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resets = <&cru SRST_MMC0>;
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reset-names = "reset";
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fifo-depth = <0x100>;
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max-frequency = <150000000>;
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};
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...
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