77 lines
2.2 KiB
Plaintext
77 lines
2.2 KiB
Plaintext
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* Samsung Multi Format Codec (MFC)
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Multi Format Codec (MFC) is the IP present in Samsung SoCs which
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supports high resolution decoding and encoding functionalities.
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The MFC device driver is a v4l2 driver which can encode/decode
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video raw/elementary streams and has support for all popular
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video codecs.
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Required properties:
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- compatible : value should be either one among the following
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(a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
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(b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
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(c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
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(d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
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(e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
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(f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
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- reg : Physical base address of the IP registers and length of memory
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mapped region.
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- interrupts : MFC interrupt number to the CPU.
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- clocks : from common clock binding: handle to mfc clock.
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- clock-names : from common clock binding: must contain "mfc",
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corresponding to entry in the clocks property.
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Optional properties:
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- power-domains : power-domain property defined with a phandle
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to respective power domain.
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- memory-region : from reserved memory binding: phandles to two reserved
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memory regions, first is for "left" mfc memory bus interfaces,
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second if for the "right" mfc memory bus, used when no SYSMMU
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support is available; used only by MFC v5 present in Exynos4 SoCs
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Obsolete properties:
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- samsung,mfc-r, samsung,mfc-l : support removed, please use memory-region
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property instead
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Example:
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SoC specific DT entry:
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mfc: codec@13400000 {
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compatible = "samsung,mfc-v5";
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reg = <0x13400000 0x10000>;
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interrupts = <0 94 0>;
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power-domains = <&pd_mfc>;
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clocks = <&clock 273>;
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clock-names = "mfc";
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};
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Reserved memory specific DT entry for given board (see reserved memory binding
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for more information):
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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mfc_left: region@51000000 {
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compatible = "shared-dma-pool";
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no-map;
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reg = <0x51000000 0x800000>;
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};
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mfc_right: region@43000000 {
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compatible = "shared-dma-pool";
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no-map;
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reg = <0x43000000 0x800000>;
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};
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};
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Board specific DT entry:
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codec@13400000 {
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memory-region = <&mfc_left>, <&mfc_right>;
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};
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