130 lines
3.0 KiB
YAML
130 lines
3.0 KiB
YAML
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||
|
|
%YAML 1.2
|
||
|
|
---
|
||
|
|
$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
|
||
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||
|
|
|
||
|
|
title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings
|
||
|
|
|
||
|
|
maintainers:
|
||
|
|
- Chen-Yu Tsai <wens@csie.org>
|
||
|
|
- Maxime Ripard <mripard@kernel.org>
|
||
|
|
|
||
|
|
description: |-
|
||
|
|
The Allwinner A10 and later has a CMOS Sensor Interface to retrieve
|
||
|
|
frames from a parallel or BT656 sensor.
|
||
|
|
|
||
|
|
properties:
|
||
|
|
compatible:
|
||
|
|
oneOf:
|
||
|
|
- const: allwinner,sun4i-a10-csi1
|
||
|
|
- const: allwinner,sun7i-a20-csi0
|
||
|
|
- items:
|
||
|
|
- const: allwinner,sun7i-a20-csi1
|
||
|
|
- const: allwinner,sun4i-a10-csi1
|
||
|
|
- items:
|
||
|
|
- const: allwinner,sun8i-r40-csi0
|
||
|
|
- const: allwinner,sun7i-a20-csi0
|
||
|
|
|
||
|
|
reg:
|
||
|
|
maxItems: 1
|
||
|
|
|
||
|
|
interrupts:
|
||
|
|
maxItems: 1
|
||
|
|
|
||
|
|
clocks:
|
||
|
|
oneOf:
|
||
|
|
- items:
|
||
|
|
- description: The CSI interface clock
|
||
|
|
- description: The CSI DRAM clock
|
||
|
|
|
||
|
|
- items:
|
||
|
|
- description: The CSI interface clock
|
||
|
|
- description: The CSI ISP clock
|
||
|
|
- description: The CSI DRAM clock
|
||
|
|
|
||
|
|
clock-names:
|
||
|
|
oneOf:
|
||
|
|
- items:
|
||
|
|
- const: bus
|
||
|
|
- const: ram
|
||
|
|
|
||
|
|
- items:
|
||
|
|
- const: bus
|
||
|
|
- const: isp
|
||
|
|
- const: ram
|
||
|
|
|
||
|
|
resets:
|
||
|
|
maxItems: 1
|
||
|
|
|
||
|
|
# FIXME: This should be made required eventually once every SoC will
|
||
|
|
# have the MBUS declared.
|
||
|
|
interconnects:
|
||
|
|
maxItems: 1
|
||
|
|
|
||
|
|
# FIXME: This should be made required eventually once every SoC will
|
||
|
|
# have the MBUS declared.
|
||
|
|
interconnect-names:
|
||
|
|
const: dma-mem
|
||
|
|
|
||
|
|
port:
|
||
|
|
$ref: /schemas/graph.yaml#/$defs/port-base
|
||
|
|
additionalProperties: false
|
||
|
|
|
||
|
|
properties:
|
||
|
|
endpoint:
|
||
|
|
$ref: video-interfaces.yaml#
|
||
|
|
unevaluatedProperties: false
|
||
|
|
|
||
|
|
properties:
|
||
|
|
bus-width:
|
||
|
|
enum: [8, 16]
|
||
|
|
|
||
|
|
data-active: true
|
||
|
|
hsync-active: true
|
||
|
|
pclk-sample: true
|
||
|
|
vsync-active: true
|
||
|
|
|
||
|
|
required:
|
||
|
|
- bus-width
|
||
|
|
- data-active
|
||
|
|
- hsync-active
|
||
|
|
- pclk-sample
|
||
|
|
- vsync-active
|
||
|
|
|
||
|
|
required:
|
||
|
|
- compatible
|
||
|
|
- reg
|
||
|
|
- interrupts
|
||
|
|
- clocks
|
||
|
|
|
||
|
|
additionalProperties: false
|
||
|
|
|
||
|
|
examples:
|
||
|
|
- |
|
||
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||
|
|
#include <dt-bindings/clock/sun7i-a20-ccu.h>
|
||
|
|
#include <dt-bindings/reset/sun4i-a10-ccu.h>
|
||
|
|
|
||
|
|
csi0: csi@1c09000 {
|
||
|
|
compatible = "allwinner,sun7i-a20-csi0";
|
||
|
|
reg = <0x01c09000 0x1000>;
|
||
|
|
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
|
clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
|
||
|
|
clock-names = "bus", "isp", "ram";
|
||
|
|
resets = <&ccu RST_CSI0>;
|
||
|
|
|
||
|
|
port {
|
||
|
|
csi_from_ov5640: endpoint {
|
||
|
|
remote-endpoint = <&ov5640_to_csi>;
|
||
|
|
bus-width = <8>;
|
||
|
|
hsync-active = <1>; /* Active high */
|
||
|
|
vsync-active = <0>; /* Active low */
|
||
|
|
data-active = <1>; /* Active high */
|
||
|
|
pclk-sample = <1>; /* Rising */
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
...
|