32 lines
1023 B
Plaintext
32 lines
1023 B
Plaintext
|
Broadcom Generic Level 2 Interrupt Controller
|
||
|
|
|
||
|
|
Required properties:
|
||
|
|
|
||
|
|
- compatible: should be one of:
|
||
|
|
"brcm,hif-spi-l2-intc" or
|
||
|
|
"brcm,upg-aux-aon-l2-intc" or
|
||
|
|
"brcm,l2-intc" for latched interrupt controllers
|
||
|
|
should be "brcm,bcm7271-l2-intc" for level interrupt controllers
|
||
|
|
- reg: specifies the base physical address and size of the registers
|
||
|
|
- interrupt-controller: identifies the node as an interrupt controller
|
||
|
|
- #interrupt-cells: specifies the number of cells needed to encode an
|
||
|
|
interrupt source. Should be 1.
|
||
|
|
- interrupts: specifies the interrupt line in the interrupt-parent irq space
|
||
|
|
to be used for cascading
|
||
|
|
|
||
|
|
Optional properties:
|
||
|
|
|
||
|
|
- brcm,irq-can-wake: If present, this means the L2 controller can be used as a
|
||
|
|
wakeup source for system suspend/resume.
|
||
|
|
|
||
|
|
Example:
|
||
|
|
|
||
|
|
hif_intr2_intc: interrupt-controller@f0441000 {
|
||
|
|
compatible = "brcm,l2-intc";
|
||
|
|
reg = <0xf0441000 0x30>;
|
||
|
|
interrupt-controller;
|
||
|
|
#interrupt-cells = <1>;
|
||
|
|
interrupt-parent = <&intc>;
|
||
|
|
interrupts = <0x0 0x20 0x0>;
|
||
|
|
};
|