114 lines
3.5 KiB
C
114 lines
3.5 KiB
C
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/*
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* Copyright (C) 2007 Ben Skeggs.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __NOUVEAU_DMA_H__
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#define __NOUVEAU_DMA_H__
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#include "nouveau_bo.h"
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#include "nouveau_chan.h"
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int nouveau_dma_wait(struct nouveau_channel *, int slots, int size);
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void nv50_dma_push(struct nouveau_channel *, u64 addr, int length);
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/*
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* There's a hw race condition where you can't jump to your PUT offset,
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* to avoid this we jump to offset + SKIPS and fill the difference with
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* NOPs.
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*
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* xf86-video-nv configures the DMA fetch size to 32 bytes, and uses
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* a SKIPS value of 8. Lets assume that the race condition is to do
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* with writing into the fetch area, we configure a fetch size of 128
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* bytes so we need a larger SKIPS value.
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*/
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#define NOUVEAU_DMA_SKIPS (128 / 4)
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/* Object handles - for stuff that's doesn't use handle == oclass. */
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enum {
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NvDmaFB = 0x80000002,
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NvDmaTT = 0x80000003,
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NvNotify0 = 0x80000006,
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NvSema = 0x8000000f,
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NvEvoSema0 = 0x80000010,
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NvEvoSema1 = 0x80000011,
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};
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static __must_check inline int
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RING_SPACE(struct nouveau_channel *chan, int size)
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{
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int ret;
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ret = nouveau_dma_wait(chan, 1, size);
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if (ret)
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return ret;
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chan->dma.free -= size;
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return 0;
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}
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static inline void
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OUT_RING(struct nouveau_channel *chan, int data)
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{
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nouveau_bo_wr32(chan->push.buffer, chan->dma.cur++, data);
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}
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#define WRITE_PUT(val) do { \
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mb(); \
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nouveau_bo_rd32(chan->push.buffer, 0); \
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nvif_wr32(&chan->user, chan->user_put, ((val) << 2) + chan->push.addr);\
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} while (0)
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static inline void
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FIRE_RING(struct nouveau_channel *chan)
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{
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if (chan->dma.cur == chan->dma.put)
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return;
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chan->accel_done = true;
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if (chan->dma.ib_max) {
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nv50_dma_push(chan, chan->push.addr + (chan->dma.put << 2),
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(chan->dma.cur - chan->dma.put) << 2);
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} else {
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WRITE_PUT(chan->dma.cur);
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}
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chan->dma.put = chan->dma.cur;
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}
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static inline void
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WIND_RING(struct nouveau_channel *chan)
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{
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chan->dma.cur = chan->dma.put;
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}
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/* NV_SW object class */
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#define NV_SW_DMA_VBLSEM 0x0000018c
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#define NV_SW_VBLSEM_OFFSET 0x00000400
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#define NV_SW_VBLSEM_RELEASE_VALUE 0x00000404
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#define NV_SW_VBLSEM_RELEASE 0x00000408
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#define NV_SW_PAGE_FLIP 0x00000500
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#endif
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